IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.
IXFK100N65X2
IXFX100N65X2
Note 1. Pulse test, t 300s, duty cycle, d 2%.
IXYS MOSFETs and IGBTs are covered 4,835,592 4,931,844 5,049,961 5,237,481 6,162,665 6,404,065 B1 6,683,344 6,727,585 7,005,734 B2 7,157,338B2
by one or more of the following U.S. patents: 4,860,072 5,017,508 5,063,307 5,381,025 6,259,123 B1 6,534,343 6,710,405 B2 6,759,692 7,063,975 B2
4,881,106 5,034,796 5,187,117 5,486,715 6,306,728 B1 6,583,505 6,710,463 6,771,478 B2 7,071,537
Source-Drain Diode
Symbol Test Conditions Characteristic Values
(T
J
= 25C, Unless Otherwise Specified) Min. Typ. Max.
I
S
V
GS
= 0V 100 A
I
SM
Repetitive, Pulse Width Limited by T
JM
400 A
V
SD
I
F
= I
S
, V
GS
= 0V, Note 1 1.4 V
t
rr
200 ns
Q
RM
1.7 μC
I
RM
17.2 A
I
F
= 50A, -di/dt = 100A/s
V
R
= 100V, V
GS
= 0V
Symbol Test Conditions Characteristic Values
(T
J
= 25C, Unless Otherwise Specified) Min. Typ. Max
g
fs
V
DS
= 10V, I
D
= 0.5 • I
D25
, Note 1 40 68 S
R
Gi
Gate Input Resistance 0.7
C
iss
10.8 nF
C
oss
V
GS
= 0V, V
DS
= 25V, f = 1MHz 6000 pF
C
rss
2.6 pF
C
o(er)
365 pF
C
o(tr)
1500 pF
t
d(on)
37 ns
t
r
26 ns
t
d(off)
90 ns
t
f
13 ns
Q
g(on)
183 nC
Q
gs
V
GS
= 10V, V
DS
= 0.5 • V
DSS
, I
D
= 0.5 • I
D25
60 nC
Q
gd
62 nC
R
thJC
0.12C/W
R
thCS
0.15C/W
Resistive Switching Times
V
GS
= 10V, V
DS
= 0.5 • V
DSS
, I
D
= 0.5 • I
D25
R
G
= 2(External)
Effective Output Capacitance
Energy related
Time related
V
GS
= 0V
V
DS
= 0.8 • V
DSS
Terminals: 1 - Gate
2,4 - Drain
3 - Source
PLUS247
TM
Outline
TO-264 Outline
Terminals: 1 = Gate
2,4 = Drain
3 = Source
b
Q
D
R
E
A
S
R1
x2
b2
b1
A1
L1
31 2
L
c
e
4
0P
e
Q1
1 2 3
4
b
C
L
D
R
Q
E
A
A1
L1
D2
D1
E1
A2
b2 2 PLCS
3 PLCS
2 PLCS
b4
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