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22
How Does the Enable Pin Work?
The enable pin cumulates two functions; it
enables/disables the driver and it generates the soft−start
time in leading edge mode control in order to control the
ramp up peak current during a startup sequence.
According the enable pin voltage level (V
ENX
) there are
three modes:
1. DISABLE MODE: when V
ENx
< V
ENX_TH1
2. SOFT−START MODE;
when V
ENX_TH1
< V
ENx
< V
ENX_TH2
3. ENABLE MODE (or NORMAL OPERATION):
when V
ENX
> V
ENX_TH2
At the end of the soft−start mode (duration fixed by the
capacitor connected to enable pin) if the output voltage is not
entered in regulation then the duty cycle is fixed to 100%
until the output reaches the regulation.
If the soft−start mode takes a longer time than the time
needed to reach the regulation level, the controller enters in a
mixed mode. During the mixed mode the duty cycle is a mixed
of the soft−start mode duty cycle generation and the duty cycle
from the normal regulation. Thus the transition from the
soft−start mode and the normal operation is done smoothly
without discontinuity on the duty cycle (see Figure 45).
0
t
0
t
PWM REG
Vsync
0
t
PWM SS
0
t
DRV
Result
0
t
2ndary currents
Mixed Mode Normal ModeSoft Start Mode
Figure 45. End of Startup Sequence Illustrating the Smooth Transition
from Soft−Start to Normal Mode via the Mixed Mode
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23
Flux Image Reconstruction
With a primary controller working in critical conduction
mode the core flux inside the transformer is null at each
beginning primary switching cycle.
Measuring the flux means integrating the voltage present
on a transformer winding. But a simple integration yields a
saw tooth voltage waveform centered to zero volts. Thus this
saw tooth represents the flux variation in the transformer
core and must be offset in order to have a true image of the
flux with a minimum voltage close to zero volts.
What we need is a triangle with a FIXED lower level,
being equal to or somewhat above zero. This necessitates the
resetting of the integrator at the beginning of each primary
on−time. In practice, it means we quickly discharge the
integrator capacitor just before the primary on−time and
release this capacitor at the start of the primary on−time.
A negative auxiliary winding or a forward winding can be
used to build the flux image via a simple RC network, which
it ensures the integration then the NCP4326 fixes the lower
level.
Figure 46 shows how the flux image is built and used for
the soft−start sequence.
The RC network (Rint & Cint) connected to the negative
output winding does the integration of the voltage present on
this winding that it yields the flux image. Then the voltage
available on Flux pin is clamped between a low and high
level (respectively V
Flux_L
and V
Flux_H
) in order to ensure
a positive saw tooth on Flux pin. After that the voltage on
Flux pin is amplified 10 times and an offset is inserted to
ensure the disable function when the enable pin is below
V
ENX_TH1
. More over the internal voltage clamp
(V
ENX_TH2
= 4.5 V) ending the soft−start duty cycle
generation when the voltage on enable pin is between
V
ENX_TH2
and V
ENX_max1
.
Next the internal Flux image (label Int_Flux on Figure 46)
is compared with the enable pin voltage for generating the
soft−start duty cycle in leading edge mode control.
On enable pin we have an internal current source that it
charge the external capacitor and fix the soft−start time by
playing with the capacitor value. If the controller is placed
in standby mode then the enable capacitor is discharged by
the internal switch. The internal clamp limits the voltage
range on the enable pin.
Flux
ENx
IENx
GND
+
5V0
GND
0V
1V
+
9RR
GND
Clamp
Int_Flux
4V5
Offset
0V5
Cint
GND
Rint
D2
C2
Neg Out
GND
T1
D1
C1
Pos Out
GND
Normal_Reg
C_SS
GND
DRVx
PWM_SS
PWM_REG
Q1
GND
ENx_CMD
Q2
HV Rail
GND
Primary
Controller
Soft−Start Secondary Controller
Figure 46. Soft−Start Detailed Schematic View
V
DD
V
DD
+
+
+
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Soft−start experimental results are illustrated by the Figure 47.
Negative auxiliary
winding (20V/div)
DRV pin Signal
(10V/div)
Enable pin voltage
(2V/div).
Int_Flux image
(2V/div) (built with
the math function :
Flux *10+0.5V)
Flux pin voltage
(0.5 V/div)
Switch ON
Switch OFF
Figure 47. Soft−Start Duty Cycle Generation During the Startup Sequence

NCP4326DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC REG SECONDRY CTRL 3OUT 16SOIC
Lifecycle:
New from this manufacturer.
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