3
dc955af
DEMO MANUAL DC955A
harDware setup
Connection to DC590 Serial Controller
J1 is the power and digital interface connector. Connect
to DC590 serial controller with supplied 14-conductor
ribbon cable.
Jumpers
JP1: Select the source for REF
+
, either an LT1790-5, or
externally supplied.
JP4: Select the source for REF
–
, either Ground (GND) or
externally supplied.
JP2, JP3: I
2
C Address Selection. These pins are connected
to CA0/f
0
and CA1, respectively. Refer to the LTC2483
data sheet for address mapping.
Analog Connections
Analog signal connections are made via the row of turret
posts along the edge of the board. Also, when connecting
the board to an existing circuit the exposed ground planes
along the edges of the board may be used to form a solid
connection between grounds.
GND: Three ground turrets are connected directly to the
internal ground planes.
V
CC
: This is the supply for the ADC. Do not draw any
power from this point.
REF
+
: Connected to the LTC2483 REF
+
pin. If the onboard
reference is being used, the reference voltage may be
monitored from this point. An external reference may be
connected to these terminals if JP1 is removed.
REF
–
: Connected to the LTC2483 REF
–
pin. Normally at
ground when JP4 is set to GND.
IN
+
, IN
–
: These are the differential inputs to the LTC2483.
CA0/f
0
: IMPORTANT—Remove JP2 before applying signals
to this turret. An external conversion clock may be applied
to the CA0/f
0
turret to modify the frequency rejection
characteristics or data output rate of the LTC2483. This
should be a square wave with a low level equal to ground
and a high level equal to V
CC
. While up to a 2MHz clock
can be used, performance may be compromised. Refer
to the LTC2483 data sheet.
experiments
Input Noise
One of the characteristics of the LTC2483 is that the 600nV
input noise floor is far below the quantization level of 38µV
when a 5V reference is used. This means that the output
will be stable if the input noise level is significantly below
38µV. In this sense, the LTC2483 is a true 17 effective bit
part, whereas many 16-bit SAR converters have several
LSBs of noise.
Solder a short wire from the IN
–
turret post to the IN
+
turret post. Noise should be below the quantization level
of the LTC2483. This will result in a noise reading of zero
on the control software, unless the offset is such that the
display flickers between two codes in which case the RMS
noise reading will be incorrect.
Select EXT for the source for V
REF
on JP1 and apply a
100mV source between a GND turret post and the V
REF
turret post. A precision, adjustable voltage source such
as a Data Precision 8200 or Fluke 332A is ideal. Another
option for this experiment is a 50k/1k divider from the
LT1790A-5 output to ground, giving a 98mV output. The
resulting LSB size is 0.1/217, or 763nV. This is
small
enough to see the noise floor of the LTC2483 inputs, and
the RMS noise display should read approximately 6 to
7ppm (of the 100mV reference).
Common Mode Rejection
Tie the two inputs (still connected together) to ground
through a short wire and note the indicated voltage. Tie
the inputs to REF
+
; the difference should be less than
0.5μV due to the 140dB minimum CMRR of the LTC2483.
