BU8761KV
Communication ICs
2/3
zAbsolute maximum rating (Unless otherwise noted, Ta = 25°C)
Parameter Symbol Limits Unit
Digital power supply voltage
Analog power supply voltage
Digital pin apply voltage
Analog pin apply voltage
Input current
Power dissipation
Storage temperature range
Operation temperature range
DV
DD
RXV
DD
TXV
DD
V
TD
V
TA
I
IN
Pd
Tstg
Ta
−0.3 to +4.5
−0.3 to +4.5
−0.3 to +4.5
DV
SS
−0.3 to DV
DD
+0.3
RXV
SS
−0.3 to RXV
DD
+0.3
TXV
SS
−0.3 to TXV
DD
+0.3
−10 to +10
400
∗
−50 to +125
−30 to +85
V
V
V
V
V
V
mA
mW
°C
°C
∗
Drops by 4.0mW per 1
°C when used at more than Ta=25°C.
zRecommendable operation condition (Unless otherwise noted, Ta = 25°C)
Parameter Symbol UnitMax.Typ.Min.
DV
DD
RXV
DD
TXV
DD
2.7
2.7
2.7
−
−
−
3.3
3.3
3.3
V
V
V
Digital power supply voltege
Analog power supply voltege
Radiation resistance is not included design.
∗
zElectrical characteristics
(Unless otherwise noted, Ta = 25°C, DV
DD = RXVDD = TXVDD = 3.0V, FSYNC = 8kHz, DCLK = 256kHz,
Gain of each attenuator = 0dB)
Parameter
Conditions
Current consumption
∗1
Digital "H" level input voltage
Digital "L" level input voltage
Digital "H" level input current
Digital "L" level input current
Digital "H" level output voltage
Digital "L" level output voltage
Symbol
I
DD1
I
DD2
I
DD3
I
DD4
I
DD5
I
DD6
I
DD7
I
DD8
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
Min.
−
−
−
−
−
−
−
−
0.8DV
DD
−
−
−10
DV
DD
−
0.5
−
Typ.
8.0
7.0
6.0
5.4
5.1
3.7
3.3
0.1
−
−
−
−
−
−
Max.
11.5
10.2
8.6
7.8
7.3
5.3
4.8
20
−
0.2DV
DD
10
−
−
0.5
Unit
mA
µA
V
V
µA
µA
V
V
When all operating
Reference, Voice, SPC ON
Reference, Voice, EAR ON
Reference, Voice, RAMP ON
Reference, Voice, ON
Reference, Tone, ON
Only Reference ON
When all power down, FSYNC,
DCLK pin fixed
V
IH
=
DV
DD
V
IL
=
0V
I
OH
=
−1mA
I
OL
=
1mA
∗1
Supply voltage (DVDD, RXVDD, TXVDD) : 3V. No load for digital and analog output pin. Digital input pin except FSYNC. CLK pin
should be connected to DV
DD
or DVss.
Analog input pin should be connected to TXREF or RXREF with appropriate resistance.
Soft mute release voltage (SMUTE="0")
∗2
FSYNC=8kHz, DCLK=256kHz
∗2
∗2
∗2
∗2
∗2
∗2
∗2