MAX6335/MAX6336/MAX6337
4-Pin, Ultra-Low-Voltage, Low-Power
µP Reset Circuits with Manual Reset
4 _______________________________________________________________________________________
Pin Description
GND Ground1
—
RESET
Active-Low Reset Output. RESET remains low while V
CC
is below the reset
threshold, or MR is asserted and for a reset timeout period (t
RP
) after V
CC
rises above the reset threshold, or MR is deasserted. RESET on the
MAX6337 is open-drain.
2 RESET
Active-High Reset Output. RESET remains high while V
CC
is below the
reset threshold, or MR is asserted and for a reset timeout period (t
RP
) after
V
CC
rises above the reset threshold, or MR is deasserted. RESET also
asserts when MR is low.
NAME FUNCTION
MAX6335
MAX6336
MAX6337
1
2
—
PIN
Applications Information
Manual-Reset Inputs
Many µP-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuitry to initiate a reset. A logic low on MR
asserts reset. Reset remains asserted while MR is low,
and for the reset active timeout period after MR returns
high. MR has an internal 20kΩ pull-up resistor, so it can
be left unconnected if not used. Connect a normally
open momentary switch from MR to GND to create a
manual-reset function; external debounce circuitry is
not required.
Interfacing to µPs with
Bidirectional Reset Pins
Since the RESET output on the MAX6337 is open-drain,
this device interfaces easily with µPs that have bidirec-
tional reset pins, such as the Motorola 68HC11.
Connecting the µP supervisor’s RESET output directly
to the microcontroller’s (µC’s) RESET pin with a single
pull-up resistor allows either device to assert reset
(Figure 1).
Negative-Going V
CC
Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these devices
are relatively immune to short-duration, negative-going
V
CC
transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. Reset Comparator Overdrive graph. The graph
shows the maximum pulse width that a negative-going
V
CC
transient may typically have without issuing a reset
signal. As the amplitude of the transient increases, the
maximum allowable pulse width decreases.
Ensuring a Valid Reset Output
down to V
CC
= 0
When V
CC
falls below 1V and approaches the minimum
operating voltage of 0.7V, push/pull-structured reset
sinking (or sourcing) capabilities decrease drastically.
High-impedance CMOS-logic inputs connected to the
RESET pin can drift to indeterminate voltages. This
does not present a problem in most cases, since most
µPs and circuitry do not operate at V
CC
below 1V. For
the MAX6336, where RESET must be valid down to 0,
adding a pull-down resistor between RESET and GND
removes stray leakage currents, holding RESET low
