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3) Enable Display:
Write command – 0x3 ; Initialize 4 bit data mode
Delay – 5ms
Write command – 0x3 ; Initialize 4 bit data mode
Delay – 2ms
Write command – 0x3 ; Initialize 4 bit data mode
Delay – 2ms
Write command – 0x2 ; Initialize 4 bit data mode
Delay – 2ms
Command Write – 0x28 ; Set display lines and font
Command Write – 0x06 ; Set entry mode, shift right
Command Write – 0x0E ; Set display on, cursor on, blink on
Command Write – 0x01 ; Clear display and home cursor
COMMAND WRITE Sequence
Note: Most commands require a post processing delay, 2ms is applied typically.
PORT DIRECTION DATA or NOTES
PTG3 (R/W) OUTPUT 0
PTE6-7 (RS-EN) OUTPUT 0
PTG4-7 (DB4-7) OUTPUT Command Byte Data bits D4 – D7
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTE7 (EN) OUTPUT 0
PTG4-7 (DB4-7) OUTPUT Command Byte Data bits D0 – D3
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTE7 (EN) OUTPUT 0
Delay 2ms. Delay before next data or command access.
COMMAND READ sequence
Note: Command Read provides display busy status or current cursor location.
PORT DIRECTION DATA or NOTE
PTE6-7 (RS-EN) OUTPUT 0
PTG4-7 (DB4-7) INPUT NA
PTG3 (R/W) OUTPUT 1
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTG4-7 (DB4-7) INPUT Status Byte Data bits D4 – D7
PTE7 (EN) OUTPUT 0
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTG4-7 (DB4-7) INPUT Status Byte Data bits D0 – D3
PTE7 (EN) OUTPUT 0
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DISPLAY DATA WRITE Sequence
Note: Data writes require a post processing delay, 100us applied typically.
PORT DIRECTION DATA or NOTE
PTG3 (R/W) OUTPUT 0
PTE7 (EN) OUTPUT 0
PTE6 (RS) OUTPUT 1
PTG4-7 (DB4-7) OUTPUT Byte Data bits D4 – D7
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTE7 (EN) OUTPUT 0
PTG4-7 (DB4-7) OUTPUT Command Byte Data bits D0 – D3
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTE7 (EN) OUTPUT 0
Delay 100us. Delay before next data or command access.
Display Data READ sequence
PORT DIRECTION DATA or NOTE
PTE7 (EN) OUTPUT 0
PTE6 (RS) OUTPUT 1
PTG4-7 (DB4-7) INPUT NA
PTG3 (R/W) OUTPUT 1
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTG4-7 (DB4-7) INPUT Byte Data bits D4 – D7
PTE7 (EN) OUTPUT 0
Delay for Set-up time of 500ns.
PTE7 (EN) OUTPUT 1
Delay for access time of 500ns.
PTG4-7 (DB4-7) INPUT Status Byte Data bits D0 – D3
PTE7 (EN) OUTPUT 0
RV1 User Potentiometer
The User Potentiometer provides an adjustable linear voltage from 0 to 3.3V. The voltage
signal is made available to HCS08 port PTB0 or analog input AD0 by the USER ENABLE
switch position 3. The HCS08 ADC module can measure the input voltage to allow user
application response to the input voltage level.
DIP Switch
The DIP switch is provides 4 positions for user application. The on position applies a logic low
level to the respective PTB4 - PTB7 input port. The switch is enabled to connect to the input
port by USER ENABLE position 1. Example application of the DIP switch would be to apply a
485 or 422 node address for a network.
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SW1 – SW4 Push Switches
The push switches provide momentary active low input for user applications. The switches
provide input to HCS08 ports PTA4 – PTA7 when USER ENABLE position 2 is ON. Input
ports PTA4 – PTA7 provide KBD4 – 7 input interrupt capability also. Typical application would
be to provide program control or menu selection input.
SW4 on HCS08 PTA7 also provides the Monitor Reset operation. Enabling the Push Switches
and holding SW4 down during RESET will return a user Reset application to monitor control.
BUZZER
The BUZZER provides audio indications under user application control. When enabled by
USER ENABLE position 3, the HCS08 PTD0/TPM2CH4 output will control audio indications
generated by the BUZZER. Active logic high signal on the PTD0 signal will enable audio
output from the BUZZER. The user application can modulate the Buzzer with high and low
signals to generate custom sound effects.
BREADBOARD
The Breadboard area provides a convenient and fast interconnection for prototyping circuits on
the M68EVB908GB60 board. User may apply 22-24GA solid core wire (stripped) to make
connections between the I/O port connectors and the breadboard. Soldering not required.

M68EVB908GB60

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
MC9S08GB60 EVAL BRD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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