I2C bus interface TDA7404
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5 I
2
C bus interface
5.1 Interface protocol
The interface protocol comprises:
?
a start condition (S)
?
a chip address byte (the LSB bit determines read / write transmission)
?
a subaddress byte
?
a sequence of data (N-bytes + acknowledge)
?
a stop condition (P)
?
the max. clock speed is 500 Kbits/s
Figure 17. Software specification
S = Start
R/W = "0" -> Receive-Mode (Chip could be programmed by P)
"1" -> Transmission-Mode (Data could be received by P)
ACK = Acknowledge
P = Stop
5.2 Transmitted data (send mode)
SM = Soft mute activated
X = Not Used
The transmitted data is automatic updated after each ACK. Transmission can be repeated
without new chipaddress.
5.3 Reset condition
A Power on reset is invoked if the supply voltage is below than 3.5V. After that the following
data is written automatically into the registers of all subaddresses:
The programming after POR is marked bold-face / underlined in the programming tables.
S 1 0 0 0 1 0 0 R/W ACK ACK
ACK
ACK P
MSB
LSB MSB LSB MSB LSB
CHIP ADDRESS
D99AU1044
I
3
I
0
SUBADDRESS DATA 1 to DATA n
I
2
I
1
A
3
A
2
A
1
A
0
MSB LSB
XXXXXXXSM
MSB LSB
1 1111110
