CS8126-1YDPSR7

CS8126
http://onsemi.com
7
CIRCUIT DESCRIPTION
The CS8126 RESET
function, has hysteresis on both the
Reset and Delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1.0 V.
The RESET
circuit output is an open collector type with
ON and OFF parameters as specified. The RESET
output
NPN transistor is controlled by the two circuits described
(see Block Diagram).
Low Voltage Inhibit Circuit
This circuit monitors output voltage, and when the output
voltage falls below V
RT(OFF)
, causes the RESET output
transistor to be in the ON (saturation) state. When the output
voltage rises above V
RT(ON)
, this circuit permits the RESET
output transistor to go into the OFF state if allowed by the
RESET
Delay circuit.
RESET Delay Circuit
This circuit provides a programmable (by external
capacitor) delay on the RESET
output lead. The Delay lead
provides source current to the external delay capacitor only
when the “Low Voltage Inhibit” circuit indicates that output
voltage is above V
RT(ON)
. Otherwise, the Delay lead sinks
current to ground (used to discharge the delay capacitor).
The discharge current is latched ON when the output voltage
falls below V
RT(OFF)
. The Delay capacitor is fully
discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled RESET
pulse is generated following
detection of an error condition. The circuit allows the
RESET
output transistor to go to the OFF (open) state only
when the voltage on the Delay lead is higher than V
DC(H1)
.
The Delay time for the RESET
function is calculated from
the formula:
Delay time +
C
Delay
V
Delay
Threshold
I
Charge
Delay time + C
Delay
3.2 10
5
If C
Delay
= 0.1 mF, Delay time (ms) = 32 ms ± 50%: i.e.
16 ms to 48 ms. The tolerance of the capacitor must be taken
into account to calculate the total variation in the delay time.
Figure 13. Application Diagram
GND
V
IN
V
OUT
CS8126
C
1
*
100 nF
C
2
**
10 mF to 100 mF
* C
1
is required if the regulator is far from the power source filter.
** C
2
is required for stability.
RESET
Delay
R
RST
4.7 kW
Delay
0.1 mF
APPLICATION NOTES
Stability Considerations
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR, can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (25°C to 40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor C
2
shown in the test and
applications circuit should work for most applications,
however it is not necessarily the optimized solution.
To determine an acceptable value for C
2
for a particular
application, start with a tantalum capacitor of the
recommended value and work towards a less expensive
alternative part.
CS8126
http://onsemi.com
8
Step 1: Place the completed circuit with a tantalum
capacitor of the recommended value in an environmental
chamber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade box
outside the chamber, the small resistance added by the
longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load while
observing the output for any oscillations. If no oscillations
are observed, the capacitor is large enough to ensure a stable
design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using the
decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that cause
the greatest oscillation. This represents the worst case load
conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage
conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4 with
the next smaller valued capacitor. A smaller capacitor will
usually cost less and occupy less board space. If the output
oscillates within the range of expected operating conditions,
repeat steps 3 and 4 with the next larger standard capacitor
value.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Raise the temperature to the highest specified
operating temperature. Vary the load current as instructed in
step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for the
tolerance of the capacitor and any variations in regulator
performance. Most good quality aluminum electrolytic
capacitors have a tolerance of ± 20% so the minimum value
found should be increased by at least 50% to allow for this
tolerance plus the variation which will occur at low
temperatures. The ESR of the capacitor should be less than
50% of the maximum allowable ESR found in step 3 above.
Calculating Power Dissipation in a Single Output
Linear Regulator
The maximum power dissipation for a single output
regulator (Figure 14) is:
P
D(max)
+
NJ
V
IN(max)
* V
OUT(min)
Nj
I
OUT(max)
) V
IN(max)
I
Q
(1)
where:
V
IN(max)
is the maximum input voltage,
V
OUT(min)
is the minimum output voltage,
I
OUT(max)
is the maximum output current, for the
application, and
I
Q
is the quiescent current the regulator consumes at
I
OUT(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
q
JA
can be calculated:
R
QJA
+
150° C * T
A
P
D
(2)
The value of R
q
JA
can then be compared with those in the
package section of the data sheet. Those packages with
R
q
JA
s less than the calculated value in equation 2 will keep
the die temperature below 150°C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
Figure 14. Single Output Regulator With Key
Performance Parameters Labeled
SMART
REGULATOR®
Control
Features
I
OUT
I
IN
I
Q
V
IN
V
OUT
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
q
JA
.
R
QJA
+ R
QJC
) R
QCS
) R
QSA
(3)
where:
R
q
JC
= the junctiontocase thermal resistance,
R
q
CS
= the casetoheatsink thermal resistance, and
R
q
SA
= the heatsinktoambient thermal resistance.
R
q
JC
appears in the package section of the data sheet. Like
R
q
JA
, it is a function of package type. R
q
CS
and R
q
SA
are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
CS8126
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9
PACKAGE DIMENSIONS
D
2
PAK7 (SHORT LEAD)
DPS SUFFIX
CASE 936AB01
ISSUE B
0.539
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
E 0.380 0.420 9.65 10.67
D 0.325 0.368 8.25 9.53
A 0.170 0.180 4.32 4.57
b 0.026 0.036 0.66 0.91
c2 0.045 0.055 1.14 1.40
e 0.050 BSC 1.27 BSC
H 0.579 13.69 14.71
L1
A1 0.000 0.010 0.00 0.25
c 0.017 0.026 0.43 0.66
E
D
L1
c2
c
b
e
E1
D1
H
−−− 0.066 −−− 1.68
L 0.058 0.078 1.47 1.98
M
L3 0.010 BSC 0.25 BSC
0 8 °°0 8 °°
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
RECOMMENDED
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH AND GATE PROTRUSIONS. MOLD FLASH
AND GATE PROTRUSIONS NOT TO EXCEED
0.005 MAXIMUM PER SIDE. THESE DIMENSIONS
TO BE MEASURED AT DATUM H.
4. THERMAL PAD CONTOUR OPTIONAL WITHIN
DIMENSIONS E, L1, D1, AND E1. DIMENSIONS
D1 AND E1 ESTABLISH A MINIMUM MOUNTING
SURFACE FOR THE THERMAL PAD.
D1 0.270 −−− 6.86 −−−
E1 0.245 −−− 6.22 −−−
A
DIMENSIONS: MILLIMETERS
0.424
7X
0.584
0.310
0.136
0.040
0.050
PITCH
SOLDERING FOOTPRINT*
A1
L3
B
H
L
M
DETAIL C
SEATING
PLANE
GAUGE
PLANE
A
7X
M
A
M
0.13 B
E/2
B
SEATING
PLANE
A
A
DETAIL C
VIEW AA
M
A
M
0.10 B
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
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Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
CS8126/D
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
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CS8126-1YDPSR7

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5V 750mA
Lifecycle:
New from this manufacturer.
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