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CS8126-1YTHER5G

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2009
October, 2009 − Rev. 18
1 Publication Order Number:
CS8126/D
CS8126
5.0 V, 750 mA Low
Dropout Linear Regulator
with Delayed RESET
The CS8126 is a low dropout, high current 5.0 V linear regulator. It
is an improved replacement for the CS8156. Improvements include
higher accuracy, tighter saturation control, better supply rejection, and
enhanced RESET
circuitry. Familiar PNP regulator features such as
reverse battery protection, overvoltage shutdown, thermal shutdown,
and current limit make the CS8126 suitable for use in automotive and
battery operated equipment. Additional on−chip filtering has been
included to enhance rejection of high frequency transients on all
external leads.
An active microprocessor RESET
function is included on−chip with
externally programmable delay time. During power−up, or after
detection of any error in the regulated output, the RESET
lead will
remain in the low state for the duration of the delay. Types of errors
include short circuit, low input voltage, overvoltage shutdown,
thermal shutdown, or others that cause the output to become
unregulated. This function is independent of the input voltage and will
function correctly with an output voltage as low as 1.0 V. Hysteresis is
included in both the reset and Delay comparators for enhanced noise
immunity. A latching discharge circuit is used to discharge the Delay
capacitor, even when triggered by a relatively short fault condition.
This circuit improves upon the commonly used SCR structure by
providing full capacitor discharge (0.2 V type).
Note: The CS8126 is lead compatible with the LM2927 and
LM2926.
Features
• Low Dropout Voltage (0.6 V at 0.5 A)
• 3.0% Output Accuracy
• Active RESET
• External RESET Delay for Reset
• Protection Circuitry
− Reverse Battery Protection
− +60 V, −50 V Peak Transient Voltage
− Short Circuit Protection
− Internal Thermal Overload Protection
• These are Pb−Free Devices
1
7
D
2
PAK−7
DPS SUFFIX
CASE 936AB
Pin 1. V
IN
2. V
OUT
3. V
OUT(SENSE)
4. GND
5. Delay
6. RESET
7. NC
MARKING
DIAGRAM
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
A = Assembly Location
W = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Device
CS
8126
AWLYWWG
1
Device Package Shipping
†
ORDERING INFORMATION
CS8126−1YDPSR7G D
2
PAK−7
(Pb−Free)
750/Tape & Reel
CS8126−1YDPS7G D
2
PAK−7
(Pb−Free)
50 Units / Rail
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
CS8126
http://onsemi.com
2
Delay
QS
R
Latching
Discharge
−
+
V
Discharge
Charge
Current
Generator
+
−
Thermal
Shutdown
Bandgap
Reference
−
+
Anti−Saturation
and
Current Limit
+
−
GND
RESET
Pre−Regulator
Regulated Supply
for Circuit Bias
V
OUT
Over Voltage
Shutdown
V
IN
Error
Amp
Delay
Comparator
Reset
Comparator
Figure 1. Block Diagram
V
OUT(SENSE)
CS8126
http://onsemi.com
3
MAXIMUM RATINGS*
Rating Value Unit
Power Dissipation Internally Limited −
Peak Transient Voltage (46 V Load Dump) −50, 60 V
Output Current Internally Limited −
ESD Susceptibility (Human Body Model) 4.0 kV
Package Thermal Resistance:
Junction−to−Case, R
q
JC
Junction−to−Ambient, R
q
JA
2.1
10−50**
°C/W
°C/W
Junction Temperature Range −40 to +150 °C
Storage Temperature Range −55 to +150 °C
Lead Temperature Soldering: Wave Solder (through hole styles only) (Note 1)
Reflow (SMD styles only) (Note 2)
260 peak
230 peak
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. 10 second maximum.
2. 60 second maximum above 183°C.
*The maximum package power dissipation must be observed.
**Depending on thermal properties of substrate. R
q
JA
= R
q
JC
+ R
q
CA
.
ELECTRICAL CHARACTERISTICS (T
A
= −40°C to +125°C, T
J
= −40°C to +150°C, V
IN
= 6.0 to 26 V,
I
O
= 5.0 to 500 mA, R
RESET
= 4.7 kW to V
CC
, unless otherwise noted.)
Characteristic Test Conditions Min Typ Max Unit
Output Stage (V
OUT
)
Output Voltage − 4.85 5.00 5.15 V
Dropout Voltage I
OUT1
= 500 mA − 0.35 0.60 V
Supply Current I
OUT
≤ 10 mA
I
OUT
≤ 100 mA
I
OUT
≤ 500 mA
−
−
−
2.0
6.0
55
7.0
12
100
mA
mA
mA
Line Regulation V
IN
= 6.0 to 26 V, I
OUT
= 50 mA − 5.0 50 mV
Load Regulation I
OUT
= 50 to 500 mA, V
IN
= 14 V − 10 50 mV
Ripple Rejection f = 120 Hz, V
IN
= 7.0 to 17 V, I
OUT
= 250 mA 54 75 − dB
Current Limit − 0.75 1.20 − A
Overvoltage Shutdown − 32 − 40 V
Maximum Line Transient V
OUT
≤ 5.5 V − 95 − V
Reverse Polarity Input Voltage DC
V
OUT
≥ −0.6 V, 10 W Load
−15 −30 − V
Reverse Polarity Input Voltage Transient
1.0% Duty Cycle, T < 100 ms, 10 W Load
− −80 − V
Thermal Shutdown Note 3 150 180 210 °C
3. Guaranteed By Design
P1-P3P4-P6P7-P9

CS8126-1YTHER5G

Mfr. #:
Buy CS8126-1YTHER5G
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5V 750mA w/Delayed Reset
Lifecycle:
New from this manufacturer.
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