220-625 MHz High Performance Differential (VC) TCXO
Rev. 1.5Page 4 of 8www.sitime.com
Termination Diagrams
LVPECL:
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
50
VTT = VDD – 2.0 V
LVPECL Driver
Receiver Device
50
VDD
Figure 3. LVPECL Typical Termination
D+
D-
OUT+
OUT-
LVPECL Driver
Receiver Device
Z0 = 50
Z0 = 50
R1
50 50
R1
VTT
100nF
100nF
VDD
VDD= 3.3V => R1 = 100 to 150
VDD= 2.5V => R1 = 75
Figure 4. LVPECL AC Coupled Termination
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
LVPECL Driver
Receiver Device
R1
R2
R3
R4
VDD
VDD = 3.3V => R1 = R3 = 133 and
R2 = R4 = 82
VDD = 2.5V => R1 = R3 = 250 and
R2 = R4 = 62.5
VDD
Figure 5. LVPECL with Thevenin Typical Termination
The Smart TimingChoice
The Smart Timing Choice
SiT5022
220-625 MHz High Performance Differential (VC) TCXO
Rev. 1.5Page 5 of 8www.sitime.com
LVDS:
Figure 6. LVDS Single Termination (Load Terminated)
Z0 = 50
Z0 = 50
D+
D-
OUT+
OUT-
100
LVDS Driver
Receiver Device
VDD
The Smart TimingChoice
The Smart Timing Choice
SiT5022
220-625 MHz High Performance Differential (VC) TCXO
Rev. 1.5Page 6 of 8www.sitime.com
Notes:
1.Top Marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
2.A capacitor of value 0.1 F between Vdd and GND is recommended.