D
7/96
TOP200-4/14
7
Simple Optocoupler Feedback
The circuit shown in Figure 8 is a 7.5 V,
15 W secondary regulated flyback power
supply using the TOP202 that will
operate from 85 to 265 VAC input
voltage. Improved output voltage
accuracy and regulation over the circuit
of Figure 7 is achieved by using an
optocoupler and secondary referenced
Zener diode. The general operation of
the power stage of this circuit is the same
as that described for Figure 7.
The input voltage is rectified and filtered
by BR1 and C1. L2, C6 and C7 reduce
conducted emission currents. The bias
winding is rectified and filtered by D3
and C4 to create a typical 11 V bias
voltage. Zener diode (VR2) voltage
together with the forward voltage of the
LED in the optocoupler U2 determine
the output voltage. R1, the optocoupler
current transfer ratio, and the TOPSwitch
control current to duty cycle transfer
function set the DC control loop gain.
C5 together with the control pin dynamic
impedance and capacitor ESR establish
a control loop pole-zero pair. C5 also
determines the auto-restart frequency
and filters internal gate drive switching
currents. R2 and VR2 provide minimum
current loading when output current is
low. See DN-11 for more information
regarding the use of the TOP202 in a
low-cost, 15 W universal power supply.
Accurate Optocoupler Feedback
The circuit shown in Figure 9 is a highly
accurate, 15 V, 30 W secondary-
regulated flyback power supply that will
operate from 85 to 265 VAC input
voltage. A TL431 shunt regulator
directly senses and accurately regulates
the output voltage. The effective output
voltage can be fine tuned by adjusting
the resistor divider formed by R4 and
R5. Other output voltages are possible
by adjusting the transformer turns ratios
as well as the divider ratio.
The general operation of the input and
power stages of this circuit are the same
as that described for Figures 7 and 8. R3
and C5 tailor frequency response. The
TL431 (U2) regulates the output voltage
by controlling optocoupler LED current
(and TOPSwitch duty cycle) to maintain
an average voltage of 2.5 V at the TL431
input pin. Divider R4 and R5 determine
the actual output voltage. C9 rolls off
the high frequency gain of the TL431 for
stable operation. R1 limits optocoupler
LED current and determines high
frequency loop gain. For more
information, refer to application note
AN-14.
Figure 8. Schematic Diagram of a 15 W Universal Input Power Supply Utilizing the TOP202 and Simple Optocoupler Feedback.
PI-1695-112895
7.5 V
RTN
C5
47µF
D2
UG8BT
D3
1N4148
R2
68
VR2
1N5234B
6.2 V
C3
120 µF
25 V
T1
D1
UF4005
C2
680 µF
25 V
VR1
P6KE150
CIRCUIT PERFORMANCE:
Line Regulation - ±0.5%
(85-265 VAC)
Load Regulation - ±1%
(10 -100%)
Ripple Voltage ± 50 mV
Meets CISPR-22 Class B
BR1
400 V
C1
33 µF
400 V
R1
39
U2
NEC2501
U1
TOP202YAI
DRAIN
SOURCE
CONTROL
C4
0.1 µF
C7
1 nF
Y1
L1
3.3 µH
F1
3.15 A
J1
C6
0.1 µF
L2
22 mH
L
N
ST202A REFERENCE DESIGN BOARD
TOP200-4/14
D
7/96
8
Figure 10. Schematic Diagram of a 65 W 230 VAC Input Boost Power Factor Correction Circuit Utilizing the TOP202.
Figure 9. Schematic Diagram of a 30 W Universal Input Power Supply Utilizing the TOP204 and Accurate Optocoupler Feedback.
PI-1696-112895
15 V
RTN
BR1
400 V
C1
47 µF
400 V
C5
47 µF
C4
0.1 µF
U1
TOP204YAI
R3
6.2
R2
200 Ω
1/2 W
D2
MUR610CT
D3
1N4148
C2
1000 µF
35 V
T1
D1
BYV26C
C7
1 nF
Y1
DRAIN
SOURCE
CONTROL
C3
120 µF
25 V
U2
NEC2501
U3
TL431
R4
49.9 k
R5
10 k
C9
0.1 µF
R1
510
VR1
P6KE200
L1
3.3 µH
F1
3.15 A
J1
C6
0.1 µF
L2
33 mH
L
N
CIRCUIT PERFORMANCE:
Line Regulation - ±0.2%
(85-265 VAC)
Load Regulation - ±0.2%
(10-100%)
Ripple Voltage ±150 mV
Meets CISPR-22 Class B
ST204A REFERENCE DESIGN BOARD
PI-1750-012296
V
o
RTN
D1
MUR460
BR1
400 V
R1
200 k
R2
200
R10
6.8 k
R3
3 k
VR1
IN5386B
VR2
IN5386B
D2
1N4935
C1
220 nF
400 V
C4
47 µF
C2
4.7 µF
C3
220 µF
L1
500 µH
EMI
FILTER
AC
IN
U1
TOP202YAI
DRAIN
SOURCE
CONTROL
TYPICAL PERFORMANCE:
Power Factor = 0.98
THD = 8%
D
7/96
TOP200-4/14
9
Boost PFC Pre-regulator
TOPSwitch can also be used as a fixed
frequency, discontinuous mode boost
pre-regulator to improve Power Factor
and reduce Total Harmonic Distortion
(THD) for applications such as power
supplies and electronic ballasts. The
circuit shown in Figure 10 operates from
230 VAC and delivers 65 W at 410 VDC
with typical Power Factor over 0.98 and
THD of 8%. Bridge Rectifier BR1 full
wave rectifies the AC input voltage. L1,
D1, C4, and TOPSwitch make up the
boost power stage. D2 prevents reverse
current through the TOPSwitch body
diode due to ringing voltages generated
General Circuit Operation (cont.)
When power is first applied, C3 charges
to typically 5.7 volts before TOPSwitch
starts. C3 then provides TOPSwitch
bias current until the output voltage
becomes regulated. When the output
voltage becomes regulated, series
connected Zener diodes VR1 and VR2
begin to conduct, drive current into the
TOPSwitch control pin, and directly
control the duty cycle. C3 together with
R3 perform low pass filtering on the
feedback signal to prevent output line
frequency ripple voltage from varying
the duty cycle. For more information,
refer to Design Note DN-7.
Keep the SOURCE pin length very short.
Use a Kelvin connection to the SOURCE
pin for the CONTROL pin bypass
capacitor. Use single point grounding
techniques at the SOURCE pin as shown
in Figure 11.
Minimize peak voltage and ringing on
the DRAIN voltage at turn-off. Use a
Zener or TVS Zener diode to clamp the
DRAIN voltage.
Do not plug the TOPSwitch device into
a “hot” IC socket during test. External
CONTROL pin capacitance may deliver
a surge current sufficient to trigger the
shutdown latch which turns the
TOPSwitch off.
Under some conditions, externally
provided bias or supply current driven
into the CONTROL pin can hold the
TOPSwitch in one of the 8 auto-restart
cycles indefinitely and prevent starting.
Shorting the CONTROL pin to the
SOURCE pin will reset the TOPSwitch.
To avoid this problem when doing bench
evaluations, it is recommended that the
V
C
power supply be turned on before the
DRAIN voltage is applied.
CONTROL pin currents during auto-
restart operation are much lower at low
input voltages (< 20 V) which increases
the auto-restart cycle period (see the I
C
vs. Drain Voltage Characteristic curve).
Short interruptions of AC power may
cause TOPSwitch to enter the 8-count
auto-restart cycle before starting again.
This is because the input energy storage
capacitors are not completely discharged
and the CONTROL pin capacitance has
not discharged below the pin internal
power-up reset voltage.
In some cases, minimum loading may
be necessary to keep a lightly loaded or
unloaded output voltage within the
desired range due to the minimum ON-
time.
For additional applications information
regarding the TOPSwitch family, refer
to AN-14.
Key Application Issues
Figure 11. Recommended TOPSwitch Layout.
PI-1240-110194
PC Board
Kelvin-connected
bypass capacitor
and/or compensation network
Bias/Feedback Input
Bias/Feedback Return
High-voltage Return
Bend DRAIN pin
forward if needed
for creepage
DRAIN
SOURCE
CONTROL
Do not bend SOURCE pin
Keep it short
High Voltage 
Return
Bias/Feedback
Return
Bypass
Capacitor
D
S
C
TOP VIEW
Bias/Feedback 
Input
by the boost inductance and parasitic
capacitance. R1 generates a pre-
compensation current proportional to
the instantaneous rectified AC input
voltage which directly varies the duty
cycle. C2 filters high frequency
switching currents while having no
filtering effect on the line frequency pre-
compensation current. R2 decouples
the pre-compensation current from the
large filter capacitor C3 to prevent an
averaging effect which would increase
total harmonic distortion. C1 filters
high frequency noise currents which
could cause errors in the pre-
compensation current.

TOP204YAI

Mfr. #:
Manufacturer:
Power Integrations
Description:
AC/DC Converters 30-50W 85-265 VAC 60-100W100/115/230
Lifecycle:
New from this manufacturer.
Delivery:
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