Page 1 of 15 www.irf.com 12/22/2007
Data Sheet No. PD60322
iP2004
Features
40A Multiphase building block
No derating up to T
C
= T
PCB
= 95ºC
Optimized for low power loss
Bias supply range of 4.5V to 6.0V
Operation up to 1.5MHz
Over temperature protection
Bi-directional Current flow
Under Voltage Lockout
LGA interface
7.7mm x 7.7mm x 2.2mm package
Applications
High frequency, Multi-phase
Converters
Low Duty-Ratio, High Current
Microprocessor Power Supplies
High Frequency Low Profile DC-DC
Converters
SYNCHRONOUS BUCK
LGA POWER BLOCK
Description
The iP2004 is a fully optimized solution for
high current synchronous buck multiphase
applications. Board space and design time
are greatly reduced because most of the
components required for each phase of a
typical discrete-based multiphase circuit
are integrated into a single 7.7mm x
7.7mm x 2.2mm power block. The only
additional components required for a
complete multiphase converter are a PWM
controller, the output inductors, and the
input and output capacitors.
Package
Description
Interface
Connection
Standard
Quantity
T & R
Orientation
iP2004 LGA 10 N/A
iP2004TR LGA 2000 Figure 18
Typical Application
V
IN
V
SW
P
GND
P
GND
NC
PWM
ENABLE
V
DD
iP2004
V
IN
V
OUT
Vo3
Ph_En1
PWM1
Ph_En2
PWM2
5V_sns
V
CC
V
IN
OCSet1
V
SW
1
OCSet1
V
SW
2
V
SW
1
V
SW
2
GNDSS2
SS1
PGOOD2
PGOOD1
Comp2
Comp1
Rt
Track2
Track1
Sync
Seq
Enable
VP2
FB2
FB2
VP2
VP1
Vref
FB1
VP2
FB2
V
OUT
V
SWS1
V
SWS2
V
IN
V
SW
P
GND
P
GND
PWM
ENABLE
V
DD
iP2004
NC V
SWS1
V
SWS2
IR3623
Page 2 of 15 www.irf.com 12/22/2007
Data Sheet No. PD60322
iP2004
Absolute Maximum Ratings
V
IN
to PGND ……………………..…….…. -0.5V to 16V
V
DD
to PGND …………………….….……. -0.5V to 6.5V
PWM to PGND ………………….………… -0.5V to V
DD
+ 0.5V (Note 1)
ENABLE to PGND ………………………... -0.5V to V
DD
+ 0.5V (Note 1)
Storage Temperature …………..…………. -60ºC to 150ºC
Block Temperature …………...…………… -40ºC to 150ºC (Note 5)
ESD Rating………………………….………. HBM Class 1B (500V)
MM Class B (200V)
MSL Rating………………………….………. 3
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those listed in the “Recommended
Operating Conditions” section of this specification is not implied.
Recommended Operating Conditions
PARAMETER Min Typ Max Units Conditions
Supply Voltage (V
DD
) 4.5 - 6.0 V
Input Voltage (V
IN
) 3.3 - 13.2 V
Output Voltage (V
OUT
) - - 8.0 V
Output Current (I
OUT
) - - 40 A
Switching Frequency (F
SW
)
250 - 1500 kHz
On Time Duty Cycle - - 85 %
Minimum V
SW
On Time 60 - - ns V
DD
= 5.0V, V
IN
= 12V
Block Temperature -40 - 125 ºC
Electrical Specifications
These specifications apply for T
BLK
= 0ºC to 125ºC and V
DD
= 5.0V, unless otherwise specified.
PARAMETER Min Typ Max Units Conditions
Ploss
Power Block Losses - 7.4 9.1 W
V
IN
= 12V, V
DD
= 5.0V, V
OUT
= 1.3V,
I
OUT
= 40A, F
SW
= 1MHz,
L
OUT
= 0.3uH, T
A
= 25ºC
(Note 3)
V
IN
Quiescent Current - - 1.0 mA V
IN
= 12V, ENABLE = 0V
Page 3 of 15 www.irf.com 12/22/2007
Data Sheet No. PD60322
iP2004
PARAMETER Min Typ Max Units Conditions
VDD
Supply Current (Stand By) - 1.1 2.0 mA V
DD
= 5.0V, ENABLE = 0V
Supply Current (Operating) - 70 110 mA
V
IN
= 12V, V
DD
= EN ABLE = 5.0V,
F
SW
= 1MHz, 10% DC,
Power-On Reset (POR)
VCC Rising 3.7 - 4.5 V
Hysterisis 140 185 230 mV V
I
Rising & Falling
ENABLE INPUT
Logic Level Low Threshold (V
IL
) - - 0.8 V
Logic Level High Threshold (V
IH
) 2.0 - - V
Threshold Hysterisis - 100 - mV
Weak pull-down current - 10 - µA
Rising Propagation Delay (T
PDH
) - 40 - ns
Falling Propagation Delay (T
PDL
) - 75 - ns
Schmitt Trigger Input
VCC = POR to 6.0V
PWM INPUT
Logic Level Low Threshold (V
IL
) - - 0.8 V
Logic Level High Threshold (V
IH
) 2.0 - - V
Threshold Hysterisis - 100 - mV
Weak pull-down current - 2 - µA
Rising Propagation Delay (T
PDH
) - 50 - ns
Falling Propagation Delay (T
PDL
) - 35 - ns
Schmitt Trigger Input
VCC = POR to 6.0V
(Note 4)
Notes:
1. Must not exceed 6.5V.
2. Guaranteed by design, not tested in production.
3. Measurement made with six 10µF (TDK C3225X5R1C106KT or equivalent) ceramic capacitors across V
IN
to P
GND
pins (see Figure 9).
4. TPDH and TPDL are not associated with rise and fall times. Does not affect Power Loss (see Figure 10).
5. Block Temperature is defined as any Die temperature within the package.

IP2004TR

Mfr. #:
Manufacturer:
Infineon / IR
Description:
Switching Controllers SYNC LGA PWR BLOCK 40A iPOWIR 1.5MHz
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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