PIC18F2423/2523/4423/4523
DS80289E-page 4 © 2007 Microchip Technology Inc.
6. Module: MSSP (SPI Mode)
When the SPI is using Timer2/2 as the clock
source, a shorter than expected SCK pulse may
occur on the first bit of the transmitted/received
data (Figure 1).
FIGURE 1: SCK PULSE VARIATION
USING TIMER2/2
Work around
To avoid producing the short pulse, turn off Timer2
and clear the TMR2 register, load the SSPBUF
with the data to transmit and then turn Timer2 back
on. Refer to Example 2 for sample code.
EXAMPLE 2: AVOIDING THE INITIAL
SHORT SCK PULSE
Date Codes that pertain to this issue:
All engineering and production devices.
7. Module: 12-Bit Analog-to-Digital
Converter
When the AD clock source is selected as 2 TOSC or
RC (when ADCS2:ADCS0 = 000 or x11), the E
IL
(Integral Linearity Error) and EDL (Differential
Linearity Error) may exceed the data sheet
specification at codes 2047, 2048 and 2049.
Work around
Select the AD clock source as 4 TOSC, 8 TOSC,
16 T
OSC, 32 TOSC or 64 TOSC and avoid selecting
2T
OSC or RC.
Date Codes that pertain to this issue:
All engineering and production devices.
SDO
SCK
Write SSPBUF
bit 0 = 1 bit 1 = 0 bit 2 = 1 . . . .
LOOP BTFSS SSPSTAT, BF ;Data received?
;(Xmit complete?)
BRA LOOP ;No
MOVF SSPBUF, W ;W = SSPBUF
MOVWF RXDATA ;Save in user RAM
MOVF TXDATA, W ;W = TXDATA
BCF T2CON, TMR2ON ;Timer2 off
CLRF TMR2 ;Clear Timer2
MOVWF SSPBUF ;Xmit New data
BSF T2CON, TMR2ON ;Timer2 on
