LT3980
17
3980fa
For more information www.linear.com/LT3980
Figure 8. Diode D4 Prevents a Shorted Input from Discharging a
Backup Battery Tied to the Output. It Also Protects the Circuit from
a Reversed Input. The LT3980 Runs Only When the Input Is Present
V
IN
BOOST
GND FB
RUN/SS
V
C
SW
D4
MBRS360
V
IN
LT3980
3980 F08
V
OUT
BACKUP
Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation
pacitors can cause problems if the LT3980 is plugged into
a live supply (see Linear Technology Application Note 88
for a complete discussion). The low loss ceramic capacitor,
combined with stray inductance in series with the power
source, forms an under damped tank circuit, and the
voltage at the V
IN
pin of the LT3980 can ring to twice the
nominal input voltage, possibly exceeding the LT3980’s
rating and damaging the part. If the input supply is poorly
controlled or the user will be plugging the LT3980 into an
energized supply, the input network should be designed
to prevent this overshoot. Figure 10 shows the waveforms
that result when an LT3980 circuit is connected to a 24V
supply through six feet of 24-gauge twisted pair. The
first plot is the response with a 4.7µF ceramic capacitor
at the input. The input voltage rings as high as 50V and
the input current peaks at 26A. A good solution is shown
in Figure 10b. A 0.7Ω resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1µF capacitor improves high
frequency filtering. For high input voltages its impact on
efficiency is minor, reducing efficiency by 1.5 percent for
a 5V output at full load operating from 24V.
applicaTions inFormaTion
V
IN
pin. Figure 8 shows a circuit that will run only when
the input voltage is present and that protects against a
shorted or reversed input.
R
PG
VIAS TO LOCAL GROUND PLANE
VIAS TO V
OUT
VIAS TO RUN/SS
VIAS TO PG
VIAS TO V
IN
OUTLINE OF LOCAL
GROUND PLANE
3980 F09
L1
C2
R
RT
R
C
R2
R1
C
C
V
OUT
D1
C1
GND
VIAS TO SYNC
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 9 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT3980’s V
IN
and SW pins, the catch
diode (D1) and the input capacitor (C1). The loop formed
by these components should be as small as possible. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB and V
C
nodes small so that the ground
traces will shield them from the SW and BOOST nodes.
The Exposed Pad on the bottom of the package must be
soldered to ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
much as possible, and add thermal vias under and near
the LT3980 to additional ground planes within the circuit
board and on the bottom side.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3980 circuits. However, these ca
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