1/8April 2001
■ HIGH SPEED: t
PD
= 5ns (TYP.) at V
CC
= 5V
■ LOW POWER DISSIPATION:
I
CC
= 2µA(MAX.) at T
A
=25°C
■ COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
■ 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
■ SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74ACT02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS tecnology.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
74ACT02
QUAD 2-INPUT NOR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
DIP 74ACT02B
SOP 74ACT02M 74ACT02MTR
TSSOP 74ACT02TTR
TSSOPDIP SOP
Obsolete Product(s) - Obsolete Product(s)