8
FN6755.2
September 25, 2015
IRQ1/F
OUT
(Interrupt Output 1/Frequency Output)
This dual-function pin can be used as an alarm interrupt or a
frequency output pin. The IRQ1
/F
OUT
mode is selected via
the control register (address 0Eh). The IRQ1
/F
OUT
is an
open drain output.
This pin has a default output of 32.768kHz at power-up.
• Interrupt Mode. The pin provides an interrupt signal
output. This signal notifies a host processor that an alarm
has occurred and requests action.
• Frequency Output Mode. The pin outputs a clock signal
that is related to the crystal frequency. The frequency
output is user selectable and is enabled via the I
2
C bus.
IRQ2
(Interrupt Output 2)
The IRQ2 pin is used as an Alarm1 interrupt and/or an
Alarm2 interrupt. The IRQ2
mode is selected via the control
register (address 0Eh). The IRQ2
is an open drain output.
This pin is high impedance at power-up.
The pin provides an interrupt signal output. This signal
notifies a host processor that an alarm has occurred and
requests action.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of the
device. The input buffer on this pin is always active (not gated).
The SCL pin can accept a logic high voltage up to 5.5V.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor,
and it can accept a pull-up voltage up to 5.5V. The output
circuitry controls the fall time of the output signal with the use
of a slope-controlled pull-down. The circuit is designed for
400kHz I
2
C interface speeds.
NOTE: Parts will work with SDA pull-up voltage above the V
PULLUP
limit, but the t
AA
and t
F
in the I
2
C parameters are not guaranteed.
V
DD
, GND
These are chip power supply and ground pins. The device
will have full operation with a power supply from 1.8V to
3.6VDC, and a timekeeping function with a power supply
from 1.4V to 1.8V.
A 0.1µF decoupling capacitor is recommended on the V
DD
pin to ground.
Functional Description
Real Time Clock Operation
The Real Time Clock (RTC) uses an external 32.768kHz
quartz crystal to maintain an accurate internal representation
of second, minute, hour, day of week, date, month, and year.
The RTC also has leap-year correction. The RTC corrects
for months having fewer than 31 days and has a bit that
controls 24-hour or AM/PM format. The clock begins
incrementing after power-up with valid oscillator condition.
ACCURACY OF THE REAL TIME CLOCK
The accuracy of the Real Time Clock depends on the
frequency of the quartz crystal that is used as the time base
for the RTC. Since the resonant frequency of a crystal is
temperature dependent, RTC performance also depends
upon temperature. The frequency deviation of the crystal is a
function of the turnover temperature of the crystal from the
crystal’s nominal frequency. For example, a ~20ppm
frequency deviation translates into an accuracy of ~1 minute
per month. These parameters are available from the crystal
manufacturer.
I
2
C Serial Interface
The ISL12057 has an I
2
C serial bus interface that provides
access to the real-time clock registers, the control and status
registers, and the alarm registers. The I
2
C serial interface is
compatible with other industry I
2
C serial bus protocols using
a bi-directional data signal (SDA) and a clock signal (SCL).
Register Descriptions
The registers are accessible following a slave byte of
“1101000x” and they read or write to addresses [00h:0Fh].
The defined addresses and default values are described in
Table 1.
REGISTER ACCESS
The contents of the registers can be modified by performing
a byte or a page write operation directly to any register
address. The address will wrap around from 0Fh to 00h.
The registers are divided into three sections:
1. Real Time Clock (7 bytes): Address 00h to 06h
2. Alarm (7 bytes): Address 07h to 0Dh
3. Control and Status (2 bytes): Address 0Eh to 0Fh
There are no addresses above 0Fh.
A register can be read by performing a random read at any
address at any time. This returns the contents of that register
location. Additional registers are read by performing a
sequential read. For the RTC registers, the read instruction
latches all clock registers into a buffer, so an update of the
clock does not change the time being read. A sequential
read will not result in the output of data from the memory
array. At the end of a read, the master supplies a stop
condition to end the operation and free the bus. After a read
or write instruction, the address remains at the previous
address plus one, so the user can execute a current address
read and continue reading the next register.
ISL12057
