2
FN481.7
December 15, 2011
Absolute Maximum Ratings Thermal Information
The following ratings apply for each transistor in the device:
Collector-to-Emitter Voltage, V
CEO
. . . . . . . . . . . . . . . . . . . . . . 15V
Collector-to-Base Voltage, V
CBO
. . . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage, V
CIO
(Note 1). . . . . . . . . . . . . . 20V
Emitter-to-Base Voltage, V
EBO
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current (I
C
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Base Current (I
B
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to 125°C
Thermal Resistance (Typical, Note 2) θ
JA
(°C/W) θ
JC
(°C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . 135 N/A
SOIC Package . . . . . . . . . . . . . . . . . . . 200 N/A
Maximum Power Dissipation (Any One Transistor) . . . . . . . 500mW
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range. . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3083 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To
avoid undesired coupling between transistors, the substrate Terminal (5) should be maintained at either DC or signal (AC) ground. A suitable
bypass capacitor can be used to establish a signal ground.
2. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications For Equipment Design, T
A
= 25°C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
FOR EACH TRANSISTOR
Collector-to-Base Breakdown Voltage V
(BR)CBO
I
C
= 100μA, I
E
= 0 20 60 - V
Collector-to-Emitter Breakdown Voltage V
(BR)CEO
I
C
= 1mA, I
B
= 0 15 24 - V
Collector-to-Substrate Breakdown Voltage V
(BR)CIO
I
CI
= 100μA, I
B
= 0, I
E
= 0 20 60 - V
Emitter-to-Base Breakdown Voltage V
(BR)EBO
I
E
= 500μA, I
C
= 0 5 6.9 - V
Collector-Cutoff-Current I
CEO
V
CE
= 10V, I
B
= 0 - - 10 μA
Collector-Cutoff-Current I
CBO
V
CB
= 10V, I
E
= 0 - - 1 μA
DC Forward-Current Transfer Ratio (Note 3) (Figure 1) h
FE
V
CE
= 3V I
C
= 10mA 40 76 -
I
C
= 50mA 40 75 -
Base-to-Emitter Voltage (Figure 2) V
BE
V
CE
= 3V, I
C
= 10mA 0.65 0.74 0.85 V
Collector-to-Emitter Saturation Voltage (Figures 3, 4) V
CE SAT
I
C
= 50mA, I
B
= 5mA - 0.40 0.70 V
Gain Bandwidth Product f
T
V
CE
= 3V, I
C
= 10mA - 450 - MHz
FOR TRANSISTORS Q
1
AND Q
2
(As a Differential Amplifier)
Absolute Input Offset Voltage (Figure 6) |V
IO
|V
CE
= 3V, I
C
= 1mA - 1.2 5 mV
Absolute Input Offset Current (Figure 7) |I
IO
|V
CE
= 3V, I
C
= 1mA - 0.7 2.5 μA
NOTE:
3. Actual forcing current is via the emitter for this test.
CA-3083
