MAX9381
device and any added delay by circuit board traces.
The minimum supply voltage is 2.375V and is deter-
mined by input and output voltage range.
Output Termination
Terminate the outputs through 50Ω to V
CC
- 2V or use
equivalent Thevenin terminations. Terminate each Q and
Q outputs with identical termination on each for the lowest
output distortion. When a single-ended signal is taken
from the differential output, terminate both Q and Q.
Ensure that output currents do not exceed the current
limits as specified in the Absolute Maximum Ratings
table. Under all operating conditions, the device’s total
thermal limits should be observed.
Power-Supply Bypassing
Bypass V
CC
to V
EE
with high-frequency surface-mount
ceramic 0.1µF and 0.01µF capacitors. Place the capac-
itors as close to the device as possible with the 0.01µF
capacitor closest to the device pins.
Use multiple vias when connecting the bypass capaci-
tors to ground. This reduces trace inductance, which
lowers power-supply bounce when drawing high tran-
sient currents.
Circuit Board Traces
Circuit board trace layout is very important to maintain
the signal integrity of high-speed differential signals.
Maintaining integrity is accomplished in part by reduc-
ing signal reflections and skew, and increasing com-
mon-mode noise immunity.
Signal reflections are caused by discontinuities in the
50Ω characteristic impedance of the traces. Avoid dis-
continuities by maintaining the distance between differ-
ential traces, not using sharp corners, or using vias.
Maintaining distance between the traces also increases
common-mode noise immunity. Reducing signal skew
is accomplished by matching the electrical length of
the differential traces.
Chip Information
TRANSISTOR COUNT: 375
PROCESS: Bipolar
Lowest Power 3.0GHz ECL/PECL
Differential Data and Clock D Flip-Flop
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