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NLV14504BDR2G

P1-P3P4-P6P7-P8
MC14504B
http://onsemi.com
4
SWITCHING CHARACTERISTICS (C
L
= 50 pF, T
A
= 25_C)
Characteristic Symbol Shifting Mode
V
CC
Vdc
V
DD
Vdc
Limits
Unit
Min Typ
(Note 3)
Max
Propagation Delay, High to Low t
PHL
TTL – CMOS
V
DD
> V
CC
5.0
5.0
10
15
−
−
140
140
280
280
ns
CMOS – CMOS
V
DD
> V
CC
5.0
5.0
10
10
15
15
−
−
−
120
120
70
240
240
140
CMOS – CMOS
V
CC
> V
DD
10
15
15
5.0
5.0
10
−
−
−
185
185
175
370
370
350
Propagation Delay, Low to High t
PLH
TTL – CMOS
V
DD
> V
CC
5.0
5.0
10
15
−
−
170
160
340
320
ns
CMOS – CMOS
V
DD
> V
CC
5.0
5.0
10
10
15
15
−
−
−
170
170
100
340
340
200
CMOS – CMOS
V
CC
> V
DD
10
15
15
5.0
5.0
10
−
−
−
275
275
145
550
550
290
Output Rise and Fall Time t
TLH
, t
THL
ALL −
−
−
5.0
10
15
−
−
−
100
50
40
200
100
80
ns
3. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Figure 1. Input Switchpoint CMOS to CMOS Mode Figure 2. Input Switchpoint TTL to CMOS Mode
Figure 3. Operating Boundary CMOS to CMOS Mode Figure 4. Operating Boundary TTL to CMOS Mode
20151050
V
DD
, SUPPLY VOLTAGE (Vdc)
7
6
5
4
3
2
1
0
V
Sp
, INPUT SWITCHPOINT VOLTAGE (Vdc)
20151050
V
DD
, SUPPLY VOLTAGE (Vdc)
7
6
5
4
3
2
1
0
V
Sp
, INPUT SWITCHPOINT VOLTAGE (Vdc)
V
CC
= 10 V
V
CC
= 5 V
V
CC
= 5 V
V
DD
, SUPPLY VOLTAGE (Vdc)
20
15
10
5
0
20151050
V
CC
, SUPPLY VOLTAGE (Vdc)
V
DD
, SUPPLY VOLTAGE (Vdc)
20
15
10
5
0
20151050
V
CC
, SUPPLY VOLTAGE (Vdc)
MC14504B
http://onsemi.com
5
PACKAGE DIMENSIONS
PDIP−16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648−08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
B
F
C
S
H
G
D
J
L
M
16 PL
SEATING
18
916
K
PLANE
−T−
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01
____
SOIC−16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B−05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R X 45
_
G
8 PLP
−B−
−A−
M
0.25 (0.010) B
S
−T−
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
____
MC14504B
http://onsemi.com
6
PACKAGE DIMENSIONS
TSSOP−16
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F−01
ISSUE A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
___ _
SECTION N−N
SEATING
PLANE
IDENT.
PIN 1
1
8
16
9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
−U−
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V
S
T
0.10 (0.004)
−T−
−V−
−W−
0.25 (0.010)
16X REFK
N
N
P1-P3P4-P6P7-P8

NLV14504BDR2G

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Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels HEX LEVEL SHIFTER
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