LTC3201EMS#TRPBF

LTC3201
7
3201f
appropriate to compare the achievable capacitance for a
given case size rather than discussing the specified ca-
pacitance value. For example, over the rated voltage and
temperature, a 1µF, 10V, Y5V ceramic capacitor in an 0603
case may not provide any more capacitance than a 0.22µF
10V X7R available in the same 0603 case. The capacitor
manufacturer’s data sheet should be consulted to deter-
mine what value of capacitor is needed to ensure 0.22µF
at all temperatures and voltages.
Below is a list of ceramic capacitor manufacturers and
how to contact them:
AVX (843) 448-9411 www.avxcorp.com
Kemet (864) 963-6300 www.kemet.com
Murata (770) 436-1300 www.murata.com
Taiyo Yuden (800) 348-2496 www.t-yuden.com
Vishay (610) 644-1300 www.vishay.com
Open-Loop Output Impedance
The theoretical minimum open-loop output impedance of
a voltage doubling charge pump is given by:
R
VV
IFC
OUT MIN
IN OUT
OUT
()
==
21
where F if the switching frequency (1.8MHz typ) and C is
the value of the flying capacitor. (Using units of MHz and
µF is convenient since they cancel each other). Note that
the charge pump will typically be weaker than the theoreti-
cal limit due to additional switch resistance. Under normal
operation, however, with V
OUT
4V, I
OUT
< 100mA,
V
IN
> 3V, the output impedance is given by the closed-loop
value of ~0.5.
Output Ripple
The value of C
OUT
directly controls the amount of ripple for
a given load current. Increasing the size of C
OUT
will reduce
the output ripple at the expense of higher minimum turn-
on time and higher start-up current. The peak-to-peak
output ripple is approximated by the expression:
V
I
FC
RIPPLE P P
OUT
OUT
()
2
F is the switching frequency (1.8MHz typ).
Loop Stability
Both the style and the value of C
OUT
can affect the stability
of the LTC3201. The device uses a closed loop to adjust
the strength of the charge pump to match the required
output current. The error signal of this loop is directly
stored on the output capacitor. The output capacitor also
serves to form the dominant pole of the loop. To prevent
ringing or instability, it is important for the output capaci-
tor to maintain at least 0.47µF over all ambient and
operating conditions.
Excessive ESR on the output capacitor will degrade the
loop stability of the LTC3201. The closed loop DC imped-
ance is nominally 0.5. The output will thus change by
50mV with a 100mA load. Output capacitors with ESR of
0.3 or greater could cause instability or poor transient
response. To avoid these problems, ceramic capacitors
should be used. A tight board layout with good ground
plane is also recommended.
Soft-Start
The LTC3201 has built-in soft-start circuitry to prevent
excessive input current flow at V
IN
during start-up. The
soft-start time is programmed at approximately 30µs.
Layout Considerations
Due to the high switching frequency and large transient
currents produced by the LTC3201, careful board layout is
necessary. A true ground plane is a must. To minimize
high frequency input noise ripple, it is especially important
that the filter capacitor be placed with the shortest dis-
tance to the LTC3201 (1/8 inch or less). The filter capacitor
should have the highest possible resonant frequency.
Conversely, the input capacitor does not need to be placed
close to the pin. The input capacitor serves to cancel out
the lower frequency input noise ripple. Extra inductance
on the V
IN
line actually helps input current ripple. Note that
if the V
IN
trace is lengthened to add parasitic inductance,
it starts to look like an antenna and worsen the radiated
noise. It is recommended that the filter capacitor be placed
on the left hand side next to Pin 3. The flying capacitor can
then be placed on the top of the device. It is also important
APPLICATIO S I FOR ATIO
WUU
U
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3201
8
3201f
RELATED PARTS
PACKAGE DESCRIPTIO
U
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2001
LT/TP 0102 2K • PRINTED IN USA
TYPICAL APPLICATIO
U
PART NUMBER DESCRIPTION COMMENTS
LTC1682/-3.3/-5 Doubler Charge Pumps with Low Noise LDO MS8 and SO-8 Packages, I
OUT
= 80mA, Output Noise = 60µV
RMS
LTC1751/-3.3/-5 Doubler Charge Pumps V
OUT
= 5V at 100mA, V
OUT
= 3.3V at 80mA, ADJ, MSOP Packages
LTC1754-3.3/-5 Doubler Charge Pumps with Shutdown ThinSOT
TM
Package, I
Q
= 13µA, I
OUT
= 50mA
LTC1928-5 Doubler Charge Pumps with Low Noise LDO ThinSOT Output Noise = 90µV
RMS
, V
OUT
= 5V, V
IN
= 2.7V to 4.4V
LT1932 Low Noise Boost Regulator LED Driver ThinSOT Package, High Efficiency, up to 16 LEDs
LTC3200/-5 Low Noise Doubler Charge Pump MS8 and ThinSOT (LTC3200-5) Package, I
OUT
= 100mA,
2MHz Fixed Frequency
LTC3202 Low Noise High Efficiency Charge Pump MS10 Package, 125mA Output, High Efficiency
to place the output capacitor as close to the pin as possible
to minimize inductive ringing and parasitic resistance.
Thermal Management
For higher input voltages and maximum output current
there can be substantial power dissipation in the
LTC3201. If the junction temperature increases above
approximately160°C the thermal shutdown circuitry will
automatically deactivate the output. To reduce the maxi-
mum junction temperature, a good thermal connection to
PC board is recommended. Connecting the GND pin (Pin
4) to a ground plane, and maintaining a solid ground plane
under the device on two layers of the PC board can reduce
the thermal resistance of the package and PC board
system.
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
ThinSOT is a trademark of Linear Technology Corporation.
MSOP (MS) 1001
0.53 ± 0.01
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011)
0.13 ± 0.05
(.005 ± .002)
0.86
(.034)
REF
0.50
(.0197)
TYP
12
3
45
4.88 ± 0.10
(.192 ± .004)
0.497 ± 0.076
(.0196 ± .003)
REF
8910
7
6
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
NOTE 4
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010)
0
° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.2 – 3.45
(.126 – .136)
0.889
± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
WITHOUT EXPOSED PAD OPTION
3.05 ± 0.38
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC

LTC3201EMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 100mA Ultralow N Ch Pump LED S w/ Out C
Lifecycle:
New from this manufacturer.
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