Data Sheet AD8551/AD8552/AD8554
Rev. F | Page 13 of 24
–20
100
60
–100
20
–80
–60
–40
0
40
80
TEMPERATURE (°C)
SHORT-CIRCUIT CURRENT (mA)
–75 –50 –25 0 25 50 75 100 125 150
V
SY
= 5.0V
I
SC–
I
SC+
01101-047
Figure 47. Output Short-Circuit Current vs. Temperature
100
250
200
0
150
25
50
75
125
175
225
TEMPERATURE (°C)
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
–75 –50 –25 0 25 50 75 100 125 150
V
SY
= 2.7V
R
L
= 1kΩ
R
L
= 100kΩ
R
L
= 10kΩ
01101-048
Figure 48. Output Voltage to Supply Rail vs. Temperature
100
250
200
0
150
25
50
75
125
175
225
TEMPERATURE (°C)
OUTPUT VOLTAGE TO SUPPLY RAIL (mV)
–75 –50 –25
0 25
50
75
100
125
150
V
SY
= 5.0V
R
L
= 1kΩ
R
L
= 100kΩ
R
L
= 10kΩ
01101-049
Figure 49. Output Voltage to Supply Rail vs. Temperature
AD8551/AD8552/AD8554 Data Sheet
Rev. F | Page 14 of 24
FUNCTIONAL DESCRIPTION
The AD8551/AD8552/AD8554 are high precision, rail-to-rail
operational amplifiers that can be run from a single-supply voltage.
Their typical offset voltage of less than 1 μV allows these amplifiers
to be easily configured for high gains without risk of excessive
output voltage errors. The extremely small temperature drift of
5 nV/°C ensures a minimum of offset voltage error over its
entire temperature range of −40°C to +125°C, making the
AD8551/AD8552/AD8554 amplifiers ideal for a variety of
sensitive measurement applications in harsh operating
environments, such as underhood and braking/suspension
systems in automobiles.
The AD8551/AD8552/AD8554 are CMOS amplifiers and
achieve their high degree of precision through auto-zero
stabilization. This autocorrection topology allows the
AD8551/AD8552/AD8554 to maintain its low offset voltage
over a wide temperature range and over its operating lifetime.
AMPLIFIER ARCHITECTURE
Each AD8551/AD8552/AD8554 op amps consist of two
amplifiers, a main amplifier and a secondary amplifier, used
to correct the offset voltage of the main amplifier. Both consist
of a rail-to-rail input stage, allowing the input common-mode
voltage range to reach both supply rails. The input stage consists
of an NMOS differential pair operating concurrently with a
parallel PMOS differential pair. The outputs from the
differential input stages are combined in another gain stage
whose output is used to drive a rail-to-rail output stage.
The wide voltage swing of the amplifier is achieved by using two
output transistors in a common-source configuration. The output
voltage range is limited by the drain-to-source resistance of
these transistors. As the amplifier is required to source or sink
more output current, the r
DS
of these transistors increases, raising
the voltage drop across these transistors. Simply put, the output
voltage does not swing as close to the rail under heavy output
current conditions as it does with light output current. This is a
characteristic of all rail-to-rail output amplifiers. Figure 12 and
Figure 13 show how close the output voltage can get to the rails
with a given output current. The output of the AD8551/AD8552/
AD8554 is short-circuit protected to approximately 50 mA of
current.
The AD8551/AD8552/AD8554 amplifiers have exceptional gain,
yielding greater than 120 dB of open-loop gain with a load of 2 kΩ.
Because the output transistors are configured in a common-source
configuration, the gain of the output stage, and thus the open-
loop gain of the amplifier, is dependent on the load resistance.
Open-loop gain decreases with smaller load resistances. This is
another characteristic of rail-to-rail output amplifiers.
BASIC AUTO-ZERO AMPLIFIER THEORY
Autocorrection amplifiers are not a new technology. Various IC
implementations have been available for more than 15 years with
some improvements made over time. The AD8551/AD8552/
AD8554 design offers a number of significant performance
improvements over previous versions while attaining a very
substantial reduction in device cost. This section offers a simplified
explanation of how the AD8551/AD8552/AD8554 are able to
offer extremely low offset voltages and high open-loop gains.
As noted in the Amplifier Architecture section, each AD8551/
AD8552/AD8554 op amp contains two internal amplifiers. One
is used as the primary amplifier, the other as an autocorrection,
or nulling, amplifier. Each amplifier has an associated input
offset voltage that can be modeled as a dc voltage source in
series with the noninverting input. In Figure 50 and Figure 51
these are labeled as V
OSX
, where x denotes the amplifier
associated with the offset: A for the nulling amplifier and B for
the primary amplifier. The open-loop gain for the +IN and −IN
inputs of each amplifier is given as A
X
. Both amplifiers also have
a third voltage input with an associated open-loop gain of B
X
.
There are two modes of operation determined by the action of
two sets of switches in the amplifier: an auto-zero phase and an
amplification phase.
Auto-Zero Phase
In this phase, all φA switches are closed and all φB switches are
opened. Here, the nulling amplifier is taken out of the gain loop
by shorting its two inputs together. Of course, there is a degree
of offset voltage, shown as V
OSA
, inherent in the nulling amplifier
which maintains a potential difference between the +IN and
−IN inputs. The nulling amplifier feedback loop is closed through
φB
2
and V
OSA
appears at the output of the nulling amp and on
C
M1
, an internal capacitor in the AD8551/AD8552/AD8554.
Mathematically, this is expressed in the time domain as
V
OA
[t] = A
A
V
OSA
[t] − B
A
V
OA
[t] (1)
which can be expressed as

A
OSAA
OA
B
tVA
tV
1
(2)
This demonstrates that the offset voltage of the nulling amplifier
times a gain factor appears at the output of the nulling amplifier
and, thus, on the C
M1
capacitor.
+
A
B
B
B
C
M2
V
IN+
V
NB
C
M1
V
OA
–B
A
V
NA
ФB
ФA
A
A
V
OSA
ФB
ФA
V
OUT
V
IN–
01101-050
Figure 50. Auto-Zero Phase of the AD8551/AD8552/AD8554
Data Sheet AD8551/AD8552/AD8554
Rev. F | Page 15 of 24
Amplification Phase
When the φB switches close and the φA switches open for the
amplification phase, this offset voltage remains on C
M1
and,
essentially, corrects any error from the nulling amplifier. The
voltage across C
M1
is designated as V
NA
. Furthermore, V
IN
is
designated as the potential difference between the two inputs to
the primary amplifier, or V
IN
= (V
IN+
− V
IN
). Thus, the nulling
amplifier can be expressed as
[ ] [ ]
( )
[ ]
tVBtVtVAtV
NAAOSA
IN
AOA
=][
(3)
+
A
B
B
B
C
M2
V
IN+
V
NB
C
M1
V
OA
–B
A
V
NA
ФB
ФA
A
A
V
OSA
ФB
ФA
V
OUT
V
IN–
01101-051
Figure 51. Output Phase of the Amplifier
Because φA is now open and there is no place for C
M1
to discharge,
the voltage (V
NA
), at the present time (t), is equal to the voltage
at the output of the nulling amp (V
OA
) at the time when φA was
closed. If the period of the autocorrection switching frequency is
labeled t
S
, then the amplifier switches between phases every 0.5 × t
S
.
Therefore, in the amplification phase
[ ]
=
SNANA
ttVtV
2
1
(4)
Substituting Equation 4 and Equation 2 into Equation 3 yields
[ ] [ ] [ ]
A
SOSAAA
OSAA
IN
AOA
B
ttVBA
tVAtVAtV
+
+=
1
2
1
(5)
For the sake of simplification, assume that the autocorrection
frequency is much faster than any potential change in V
OSA
or
V
OSB
. This is a valid assumption because changes in offset voltage
are a function of temperature variation or long-term wear time,
both of which are much slower than the auto-zero clock frequency
of the AD8551/AD8552/AD8554. This effectively renders V
OS
time invariant; therefore, Equation 5 can be rearranged and
rewritten as
[ ] [ ]
( )
A
OSAAAOSAAA
IN
AOA
B
VBAV
BA
tVAtV
+
+
+=
1
1
(6)
or
[ ] [ ]
+
+=
A
OSA
IN
A
OA
B
V
tVAtV
1
(7)
From these equations, the auto-zeroing action becomes evident.
Note the V
OS
term is reduced by a 1 + B
A
factor. This shows how
the nulling amplifier has greatly reduced its own offset voltage
error even before correcting the primary amplifier. This results
in the primary amplifier output voltage becoming the voltage at
the output of the AD8551/AD8552/AD8554 amplifiers. It is
equal to
[ ] [ ]
( )
NBB
OSB
INB
OUT
VBVtVAtV ++=
(8)
In the amplification phase, V
OA
= V
NB
, so this can be rewritten as
[ ] [ ]
[ ]
+
+
+
+=
A
OSB
IN
A
B
OSB
BINB
OUT
B
V
t
V
AB
VA
t
VAtV
1
(9)
Combining terms,
[ ]
[
]
(
)
OSA
B
A
OSAAA
BB
B
IN
OUT
VA
B
VBA
B
A
At
Vt
V
+
+
++=
1
(10)
The AD8551/AD8552/AD8554 architecture is optimized in
such a way that
A
A
= A
B
and B
A
= B
B
and B
A
>> 1
Also, the gain product of A
A
B
B
is much greater than A
B
. These
allow Equation 10 to be simplified to
[ ] [ ]
( )
OSBOSAAAA
IN
OUT
VVABAtVtV ++
(11)
Most obvious is the gain product of both the primary and nulling
amplifiers. This A
A
B
A
term is what gives the AD8551/AD8552/
AD8554 its extremely high open-loop gain. To understand how
V
OSA
and V
OSB
relate to the overall effective input offset voltage of
the complete amplifier, establish the generic amplifier equation of
( )
EFFOS
IN
OUT
VVkV
,
+×=
(12)
where k is the open-loop gain of an amplifier and V
OS, EFF
is its
effective offset voltage.
Putting Equation 12 into the form of Equation 11 gives
[ ] [ ]
AAEFFOSAA
IN
OUT
BAVBAtVtV
,
+
(13)
Thus, it is evident that
A
OSBOSA
EFFOS
B
VV
V
+
,
(14)
The offset voltages of both the primary and nulling amplifiers
are reduced by the Gain Factor B
A
. This takes a typical input
offset voltage from several millivolts down to an effective input
offset voltage of submicrovolts. This autocorrection scheme is
the outstanding feature of the AD8551/AD8552/AD8554 series
that continues to earn the reputation of being among the most
precise amplifiers available on the market.
HIGH GAIN, CMRR, PSRR
Common-mode and power supply rejection are indications of
the amount of offset voltage an amplifier has as a result of a change
in its input common-mode or power supply voltages. As shown
in the previous section, the autocorrection architecture of the

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