OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

85320AMILF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
REVISION B 12/19/14
85320 DATA SHEET
7 LVCMOS/LVTTL-TO-DIFFERENTIAL
3.3V, 2.5V LVPECL TRANSLATOR
APPLICATION INFORMATION
The clock layout topology shown below is a typical termination for
LVPECL outputs. The two different layouts mentioned are recom-
mended only as guidelines.
FOUT and nFOUT are low impedance follower outputs that generate
ECL/LVPECL compatible outputs. Therefore, terminating resistors
(DC current path to ground) or current sources must be used for
functionality. These outputs are designed to drive 50Ω transmission
lines. Matched impedance techniques should be used to maximize
operating frequency and minimize signal distortion. Figures 1A
and 1B show two different layouts which are recommended only
as guidelines. Other suitable clock layouts may exist and it would
be recommended that the board designers simulate to guarantee
compatibility across all printed circuit and clock component process
variations.
TERMINATION FOR LVPECL OUTPUTS
FIGURE 1B. LVPECL OUTPUT TERMINATIONFIGURE 1A. LVPECL OUTPUT TERMINATION
LVCMOS/LVTTL-TO-DIFFERENTIAL
3.3V, 2.5V LVPECL TRANSLATOR
85320 DATA SHEET
8 REVISION B 12/19/14
TERMINATION FOR 2.5V LVPECL OUTPUT
Figure 2A and Figure 2B show examples of termination for 2.5V
LVPECL driver. These terminations are equivalent to terminating
50Ω to V
CC
- 2V. For V
CC
= 2.5V, the V
CC
- 2V is very close to ground
level. The R3 in Figure 2B can be eliminated and the termination
is shown in Figure 2C.
FIGURE 2B. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 2A. 2.5V LVPECL DRIVER TERMINATION EXAMPLE
R2
62.5
Zo = 50 Ohm
R1
250
+
-
2.5V
2,5V LVPECL
Driver
R4
62.5
R3
250
Zo = 50 Ohm
2.5V
VCC=2.5V
R1
50
R3
18
Zo = 50 Ohm
Zo = 50 Ohm
+
-
2,5V LVPECL
Driver
VCC=2.5V
2.5V
R2
50
2,5V LVPECL
Driver
VCC=2.5V
R1
50
R2
50
2.5V
Zo = 50 Ohm
Zo = 50 Ohm
+
-
FIGURE 2C. 2.5V LVPECL TERMINATION EXAMPLE
REVISION B 12/19/14
85320 DATA SHEET
9 LVCMOS/LVTTL-TO-DIFFERENTIAL
3.3V, 2.5V LVPECL TRANSLATOR
R1
50
(U1-8)
R4
133
R6
133
Optional Termination
R2
50
Clk_in
R7
82.5
Zo = 50 Ohm
C2
0.1uF
R3
50
R5
82.5
C1
10uf
Zo = 50 Ohm
VCC = 3.3V
Zo = 50 Ohm
Zo = 50 Ohm
VCC
VCC = 3.3V
+
-
U1
85320
1
2
3
4
8
7
6
5
nc
Q
nQ
nc
Vcc
Clk
nc
Vee
APPLICATION SCHEMATIC EXAMPLE
Figure 3 shows an example of 85320I application schematic. In
this example, the device is operated at V
CC
=3.3V. The decoupling
capacitor should be located as close as possible to the power pin.
For LVPECL output termination, only two terminations examples are
FIGURE 3. 85320I APPLICATION SCHEMATIC EXAMPLE
shown in this schematic. For more termination approaches, please
refer to the LVPECL Termination Application Note.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

85320AMILF

Mfr. #:
Buy 85320AMILF
Manufacturer:
IDT
Description:
Clock Buffer LVCMOS/LVTTL to Diff 2.5V/3.3V LVPECL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet