ALD210808ASCL

©2017 Advanced Linear Devices, Inc., Vers. 1.2 www.aldinc.com 1 of 12
e
EPAD
TM
®
N
A
B
L
E
D
E
A
DVANCED
L
INEAR
D
EVICES,
I
NC.
GENERAL DESCRIPTION
The ALD210808A/ALD210808 precision enhancement mode N-Channel EPAD
®
MOSFET array is precision matched at the factory using ALD’s proven EPAD
®
CMOS technology. These quad monolithic devices are enhanced additions to
the ALD110808A/ALD110808 EPAD
®
MOSFET Family, with increased forward
transconductance and output conductance, particularly at very low supply volt-
ages.
Intended for low voltage, low power small signal applications, the ALD210808A/
ALD210808 features precision threshold voltage, which enables circuit designs
with input/output signals referenced to GND at enhanced operating voltage
ranges. With these devices, a circuit with multiple cascading stages can be
built to operate at extremely low supply/bias voltage levels. For example, a
nanopower input amplifier stage operating at less than 1.0V supply voltage has
been successfully built with these devices.
ALD210808A EPAD MOSFETs feature exceptional matched pair electrical char-
acteristics of Gate Threshold Voltage V
GS(th)
set precisely at +0.80V
+
0.01V,
I
DS
= +10µA @ V
DS
= 0.1V, with a typical offset voltage of only
+
0.001V (1mV).
Built on a single monolithic chip, they also exhibit excellent temperature track-
ing characteristics. These precision devices are versatile as design components
for a broad range of analog small signal applications such as basic building
blocks for current mirrors, matching circuits, current sources, differential ampli-
fier input stages, transmission gates, and multiplexers. They also excel in lim-
ited operating voltage applications, such as very low level voltage-clamps and
nano-power normally-on circuits.
In addition to precision matched-pair electrical characteristics, each individual
EPAD MOSFET also exhibits well controlled manufacturing characteristics, en-
abling the user to depend on tight design limits from different production batches.
These devices are built for minimum offset voltage and differential thermal re-
sponse, and they can be used for switching and amplifying applications in +0.1V
to +10V (
+
0.05V to
+
5V) powered systems where low input bias current, low
input capacitance, and fast switching speed are desired. At V
GS
> +0.80V, the
device exhibits enhancement mode characteristics whereas at V
GS
< +0.80V
the device operates in the subthreshold voltage region and exhibits conven-
tional sub threshold characteristics, with well controlled turn-off and sub-thresh-
old levels that operate the same as standard enhancement mode MOSFETs.
The ALD210808A/ALD210808 features high input impedance (2.5 x 10
10
) and
high DC current gain (>10
8
). A sample calculation of the DC current gain at a
drain output current of 30mA and input current of 300pA at 25°C is 30mA/300pA
= 100,000,000, which translates into a dynamic operating current range of about
eight orders of magnitude. A series of four graphs titled “Forward Transfer Char-
acteristics”, with the 2
nd
and 3
rd
sub-titled “expanded (subthreshold)” and “fur-
ther expanded (subthreshold)”, and the 4
th
sub-titled “low voltage”, illustrates
the wide dynamic operating range of these devices.
Generally it is recommended that the V+ pin be connected to the most positive
voltage and the V- and IC (internally-connected) pins to the most negative volt-
age in the system. All other pins must have voltages within these voltage limits
at all times. Standard ESD protection facilities and handling procedures for static
sensitive devices are highly recommended when using these devices.
PRECISION N-CHANNEL EPAD
®
MOSFET ARRAY
QUAD HIGH DRIVE MATCHED PAIR
FEATURES & BENEFITS
• Precision V
GS(th)
= +0.80V
+
0.010V
• V
OS
(V
GS(th)
match) to 2mV/10mV max.
• Sub-threshold voltage (nano-power) operation
• < 800mV min. operating voltage
• < 1nA min. operating current
• < 1nW min. operating power
• > 100,000,000:1 operating current ranges
• High transconductance and output conductance
• Low R
DS(ON)
of 25
• Output current > 50mA
• Matched and tracked tempco
• Tight lot-to-lot parametric control
• Positive, zero, and negative V
GS(th)
tempco
• Low input capacitance and leakage currents
APPLICATIONS
• Low overhead current mirrors and current sources
• Zero Power Normally-On circuits
• Energy harvesting detectors
• Very low voltage analog and digital circuits
• Zero power fail-safe circuits
• Backup battery circuits & power failure detector
• Extremely low level voltage-clamps
• Extremely low level zero-crossing detectors
• Matched source followers and buffers
• Precision current mirrors and current sources
• Matched capacitive probes and sensor interfaces
• Charge detectors and charge integrators
• High gain differential amplifier input stage
• Matched peak-detectors and level-shifters
• Multiple Channel Sample-and-Hold switches
• Precision Current multipliers
• Discrete matched analog switches/multiplexers
• Nanopower discrete voltage comparators
ALD210808A/ALD210808
*IC pins are internally connected, connect to V-
SCL, PCL PACKAGES
PIN CONFIGURATION
V
GS(th)
= +0.80V
ALD210808
IC*
1
2
3
14
15
16
4
13
5
12
S
N3
6
7
8
10
11
D
N1
G
N1
IC*
D
N4
S
N4
G
N4
9
G
N3
D
N3
G
N2
D
N2
V
+
S
N1
V
-
V
+
V
-
S
N2
M 4
V
-
M 1
V
-
M 2
M 3
V
-
V
-
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
*Contact factory for industrial temp. range or user-specified threshold voltage values.
Operating Temperature Range *
0°C to +70°C
16-Pin SOIC Package 16-Pin Plastic Dip Package
ALD210808ASCL ALD210808APCL
ALD210808SCL ALD210808PCL
ALD210808A/ALD210808 Advanced Linear Devices 2 of 12
Notes:
1
Consists of junction leakage currents
OPERATING ELECTRICAL CHARACTERISTICS
V
+
= +5V V
-
= GND T
A
= 25°C unless otherwise specified
ALD210808A ALD210808
Parameter Symbol Min Typ Max Min Typ Max Unit Test Conditions
Gate Threshold Voltage V
GS(th)
0.78 0.80 0.82 0.78 0.80 0.82 V I
DS
= 10µA, V
DS
= 0.1V
Offset Voltage V
OS
1 2 2 10 mV V
GS(th)M1
- V
GS(th)M2
or V
GS(th)M3
- V
GS(th)M4
Offset Voltage Tempco TC
VOS
55µV/°CV
DS1
= V
DS2
Gate Threshold Voltage Tempco TC
VGS(th)
-1.6 -1.6 mV/°CI
D
= 10µA, V
DS
= 0.1V
0.0 0.0 I
D
= 380µA, V
DS
= 0.1V
+1.6 +1.6 I
D
= 700µA, V
DS
= 0.1V
Drain Source On Current I
DS(ON)
70 70 mA V
GS
= +4.8V, V
DS
= +5V
50 50 µAV
GS
= +0.9V, V
DS
= +0.1V
Forward Transconductance G
FS
24 24 mmho V
GS
= +4.8V
V
DS
= +5.0V
Transconductance Mismatch G
FS
1.8 1.8 %
Output Conductance G
OS
1.6 1.6 mmho V
GS
= +4.8V
V
DS
= +5.0V
Drain Source On Resistance R
DS(ON)
25 25 V
GS
= +5.8V
V
DS
= +0.1V
Drain Source On Resistance R
DS(ON)
10 10 K V
GS
= +0.8V, V
DS
= +0.1V
2.0 2.0 V
GS
= +0.9V, V
DS
= +0.1V
Drain Source On Resistance R
DS(ON)
1.8 1.8 % V
GS
= +5.8V
Tolerance V
DS
= +0.1V
Drain Source On Resistance R
DS(ON)
0.6 0.6 %
Mismatch
Drain Source Breakdown BV
DSX
10 10 V V
-
= V
GS
= -0.2V
Voltage I
DS
= 10µA
Drain Source Leakage Current
1
I
DS(OFF)
10 400 10 400 pA V
GS
= -0.2V, V
DS
= +5V
V
-
= -5V
44nAT
A
= 125°C
Gate Leakage Current
1
I
GSS
5 200 5 200 pA V
GS
= +5V, V
DS
= 0V
11nAT
A
= 125°C
Input Capacitance C
ISS
15 15 pF
Transfer Reverse Capacitance C
RSS
11pF
Turn-on Delay Time t
on
10 10 ns V
+
= 5V, R
L
= 5K
Turn-off Delay Time t
off
10 10 ns V
+
= 5V, R
L
= 5K
Crosstalk 60 60 dB f = 100KHz
ABSOLUTE MAXIMUM RATINGS
Drain-Source voltage, V
DS
10.6V
Gate-Source voltage, V
GS
10.6V
Operating Current 80mA
Power dissipation 500mW
Operating temperature range SCL, PCL 0°C to +70°C
Storage temperature range -65°C to +150°C
Lead temperature, 10 seconds +260°C
CAUTION: ESD Sensitive Device. Use static control procedures in ESD controlled environment.
ALD210808A/ALD210808 Advanced Linear Devices 3 of 12
ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx high precision
monolithic quad/dual N-Channel MOSFET arrays are enhanced
versions of the ALD1108xx/ALD1109xx EPAD
®
MOSFET family, with
increased forward transconductance and output conductance, in-
tended for operation at very low power supply voltages. These de-
vices are also capable of sub-threshold operation with less than
1nA of operating supply currents and at the same time delivering
higher output drive currents (typ. > 50mA). They feature precision
Gate Offset Voltages, V
OS
, defined as the difference in V
GS(th)
between MOSFET pairs M1 and M2 or M3 and M4.
ALD's Electrically Programmable Analog Device (EPAD
®
) technol-
ogy provides the industry's only family of matched MOSFET tran-
sistors with a range of precision gate-threshold voltage values. All
members of this family are designed and actively programmed for
exceptional matching of device electrical and temperature charac-
teristics. Gate Threshold Voltage V
GS(th)
values range from -3.50V
Depletion Mode to +3.50V Enhancement Mode devices, including
standard products with V
GS(th)
specified at -3.50V, -1.30V, -0.40V,
+0.00V, +0.20V, +0.40V, +0.80V, +1.40V, and +3.30V. ALD can
also provide any customer-desired V
GS(th)
between -3.50V and
+3.50V on a special order basis. For all these devices ALD EPAD
technology enables excellent well-controlled gate threshold volt-
age, subthreshold voltage, and low leakage characteristics. With
well matched design and precision programming, units from differ-
ent production lots provide the user with exceptional matching and
uniformity characteristics. Built on the same monolithic IC chip, the
units also have excellent temperature tracking characteristics.
This ALD2108xx/ALD2129xx/ALD2148xx/ALD2169xx EPAD
MOSFET Array product family (EPAD MOSFET) is available in three
separate categories, each providing a distinctly different set of elec-
trical specifications and characteristics. The first category is the
ALD210800A/ALD210800/ALD212900A/ALD212900 Zero-Thresh-
old™ mode EPAD MOSFETs. The second is the ALD2108xx/
ALD2129xx enhancement mode EPAD MOSFETs. The third cat-
egory includes the ALD2148xx/ALD2169xx depletion mode EPAD
MOSFETs. (The suffix “xx” denotes threshold voltage in 0.1V steps,
for example, xx=08 denotes 0.80V). For each device, there is a
zero-tempco bias current and bias voltage point. When a design
utilizes such a feature, then the gate-threshold voltage is tempera-
ture stable, greatly simplifying certain designs where stability of
certain circuit parameters over a temperature range is desired.
The ALD210800A/ALD210800 are quad Zero Threshold MOSFETs
in which the individual gate-threshold voltage of each MOSFET is
set at zero, V
GS(th)
= 0.00V at I
DS(ON)
= 10µA @ V
DS(ON)
= +0.1V
(I
DS(ON)
= 20µA for the dual ALD212900A/ALD212900). Zero
Threshold MOSFETs operate in the enhancement region when op-
erated above threshold voltage (V
GS
> 0.00V and I
DS
> 10µA) and
subthreshold region when operated at or below threshold voltage
(V
GS
0.00V and I
DS
< 10µA). These devices, along with other
low V
GS(th)
members of the product family, enable ultra low supply
voltage analog or digital operation and nanopower circuit designs,
thereby reducing or eliminating the use of very high valued (expen-
sive) resistors in many cases.
The ALD2108xx/ALD2129xx (quad/dual) product family features
precision matched enhancement mode EPAD MOSFET devices,
which require a positive gate bias voltage V
GS
to turn on. Precision
V
GS(th)
values at +3.30V, +1.40V, +0.80V, +0.40V and +0.20V are
offered. No conductive channel exists between the source and drain
at zero applied gate voltage (V
GS
= 0.00V) for +3.30V, +1.40V and
+0.80V versions. The +0.40V and the +0.20V versions have a sub-
threshold current at about 1nA and 100nA for the ALD2108xx (2nA
and 200nA for the ALD2129xx) respectively at zero applied gate
voltage. They are also capable of delivering lower R
DS(ON)
and
higher output currents greater than 68mA (see specifications).
The ALD2148xx/ALD2169xx (quad/dual) features Depletion Mode
EPAD MOSFETs, which are normally-on devices at zero applied
gate voltage. The V
GS(th)
is set at a negative voltage level
(V- < V
GS
< V
S
) at which the EPAD MOSFET turns off. Without a
supply voltage and/or with V
GS
= V- = 0.00V = Ground, the EPAD
MOSFET device is already turned on and exhibits a defined and
controlled on-resistance R
DS(ON)
. An EPAD MOSFET may be
turned off when a negative voltage is applied to V- pin and V
GS
set
more negative than its V
GS(th)
. These Depletion Mode EPAD
MOSFETs are different from most other depletion mode MOSFETs
and JFETs in that they do not exhibit high gate leakage currents
and channel/junction leakage currents, while they stay controlled,
modulated and turned off at precise voltages. The same MOSFET
device equations as those for enhancement mode devices apply.
KEY APPLICATION ENVIRONMENTS
EPAD MOSFETs are ideal for circuits requiring low V
OS
and low
operating currents with tracked differential thermal responses. They
feature low input bias currents (less than 200pA max.), low input
capacitance and fast switching speed. These and other operating
characteristics offer unique solutions in one or more of the follow-
ing operating environments:
* Low supply voltage: 0.1V to 10V (
+
0.05V to
+
5V)
* Ultra low supply voltage: <
+
10mV to
+
0.1V
* Nanopower operation: voltage x current = nW or µW
* Precision V
OS
characteristics
* Matching and tracking of multiple MOSFETs
* Matching across multiple packages
ELECTRICAL CHARACTERISTICS
The turn-on and turn-off electrical characteristics of the EPAD
MOSFET products are shown in the I
DS(ON)
vs. V
DS(ON)
and
I
DS(ON)
vs. V
GS
graphs. Each graph shows I
DS(ON)
versus V
DS(ON)
characteristics as a function of V
GS
in a different operating region
under different bias conditions, while I
DS(ON)
at a given gate input
voltage is controlled and predictable. A series of four graphs titled
“Forward Transfer Characteristics”, with the 2
nd
and 3
rd
sub-titled
“expanded (subthreshold)” and “further expanded (subthreshold)”,
and the 4
th
sub-titled “low voltage”, illustrates the wide dynamic
operating range of these devices.
Classic MOSFET equations for an N-channel MOSFET also apply
to EPAD MOSFETs.
The drain current in the linear region (V
DS(ON)
< V
GS
- V
GS(th)
) is
given by:
I
DS(ON)
= u . C
OX
. W/L . [V
GS
- V
GS(th)
- V
DS
/2] . V
DS(ON)
where: u = Mobility
C
OX
= Capacitance / unit area of Gate electrode
V
GS
= Gate to Source Voltage
V
GS(th)
= Gate Threshold (Turn-on)Voltage
V
DS(ON)
= Drain to Source On Voltage
W = Channel width
L = Channel length
In this region of operation the I
DS(ON)
value is proportional to the
V
DS(ON)
value and the device can be used as a gate-voltage con-
trolled resistor.
For higher values of V
DS(ON)
where V
DS(ON)
V
GS
- V
GS(th)
, the
saturation current I
DS(ON)
is now given by (approx.):
I
DS(ON)
= u . C
OX
. W/L . [V
GS
- V
GS(th)
]
2
PERFORMANCE CHARACTERISTICS OF EPAD
®
PRECISION MATCHED PAIR MOSFET ARRAY FAMILY

ALD210808ASCL

Mfr. #:
Manufacturer:
Advanced Linear Devices
Description:
MOSFET Quad N-Ch Matched Pr VGS=0.0V
Lifecycle:
New from this manufacturer.
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