Philips Semiconductors Product data
74ABT16374B
16-bit D-type flip-flop; positive-edge trigger
(3-State)
2004 Mar 08
7
AC SET-UP REQUIREMENTS
GND = 0 V, t
R
= t
F
= 2.5 ns, C
L
= 50 pF, R
L
= 500 Ω
LIMITS
SYMBOL PARAMETER WAVEFORM
T
amb
= +25 °C
V
CC
= +5.0 V
T
amb
= –40 to +85 °C
V
CC
= +5.0 V ± 0.5 V
UNIT
MIN TYP MIN
t
s
(H)
t
s
(L)
Set-up time, HIGH or LOW
nDx to nCP
2
1.0
1.0
0.3
0.1
1.0
1.0
ns
t
h
(H)
t
h
(L)
Hold time, HIGH or LOW
nDx to nCP
2
1.0
1.0
–0.1
–0.3
1.0
1.0
ns
t
w
(H)
t
w
(L)
nCP pulse width
HIGH or LOW
1
2.8
2.8
1.2
1.5
2.8
2.8
ns
AC WAVEFORMS
V
M
= 1.5V, V
IN
= GND to 3.0V
VM VM VM
VM VM
1/f
MAX
t
w
(H) t
w
(L)
t
PHL
t
PLH
nCP
nQx
SA00328
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
V
M
nDx
V
M
V
M
V
M
V
M
V
M
nCP
t
s
(H) t
h
(H) t
s
(L) t
h
(L)
NOTE: The shaded areas indicate when the input is permitted to
change for predictable output performance.
SA00329
Waveform 2. Data Set-up and Hold Times
OE
V
M
t
PZH
t
PHZ
0V
nQx
V
M
V
M
SH00079
V
OH
V
OH
–0.3V
Waveform 3. 3-State Output Enable Time to HIGH Level and
Output Disable Time from HIGH Level
OE
t
PZL
t
PLZ
nQx
V
M
V
M
V
M
SH00080
V
OL
V
OL
+ 0.3V
Waveform 4. 3-State Output Enable Time to LOW Level and
Output Disable Time from LOW Level
