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M68AW256M
Table 7. Read and Standby Mode AC Characteristics
Note: 1. Test conditions assume transition timing reference level = 0.3V
CC
or 0.7V
CC
.
2. At any given temperature and voltage condition, t
GHQZ
is less than t
GLQX
, t
BHQZ
is less than t
BLQX
and t
EHQZ
is less than t
ELQX
for
any given device.
3. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
voltage levels.
4. Tested initially and after any design or process changes that may affect these parameters.
Symbol Parameter
M68AW256M
Unit
55 70
t
AVAV
Read Cycle Time Min 55 70 ns
t
AVQV
Address Valid to Output Valid Max 55 70 ns
t
AXQX
(1)
Data hold from address change Min 5 5 ns
t
BHQZ
(2,3)
Upper/Lower Byte Enable High to Output Hi-Z Max 20 25 ns
t
BLQV
Upper/Lower Byte Enable Low to Output Valid Max 55 70 ns
t
BLQX
(1)
Upper/Lower Byte Enable Low to Output Transition Min 5 5 ns
t
EHQZ
(2,3)
Chip Enable High to Output Hi-Z Max 20 25 ns
t
ELQV
Chip Enable Low to Output Valid Max 55 70 ns
t
ELQX
(1)
Chip Enable Low to Output Transition Min 5 5 ns
t
GHQZ
(2,3)
Output Enable High to Output Hi-Z Max 20 25 ns
t
GLQV
Output Enable Low to Output Valid Max 25 35 ns
t
GLQX
(2)
Output Enable Low to Output Transition Min 5 5 ns
t
PD
(4)
Chip Enable or UB/LB High to Power Down Max 0 0 ns
t
PU
(4)
Chip Enable or UB/LB Low to Power Up Min 55 70 ns
