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P80C557E4EFB/01,51

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
67
t
CLKL
Figure 57. External Clock Drive waveform
V
IH1
V
IH1
0.8V
t
CLK
V
IH1
V
IH1
0.8V
t
CLKH
t
CLKR
t
CLKF
2.4 V
0.45 V
2.0 V
0.8 V
NOTE:
Figure 58. AC Testing Input/Output
2.4 V
NOTE:
Figure 59. AC Testing, Float Waveform
AC inputs during testing are driven at 2.4V for a logic ‘HIGH’ and 0.45V for a logic
‘LOW’. Timing measurements are made at 2.0 V for a logic ‘HIGH’ and 0.8 V for a
logic ‘LOW’.
2.4 V
0.45 V 0.45 V
Float
2.0 V
0.8 V
2.0 V
0.8 V
Test Points
2.0 V
0.8 V
sources 400A at the voltage test levels.
The float state is defined as the point at which a port 0 pins sinks 3.2 mA or
t
PXIZ
Figure 60. External Program Memory Read Cycle
ALE
PSEN
PORT 0
PORT 2
A8–A15 A8–A15
A0–A7 A0–A7
t
AVLL
t
PXIX
t
LLAX
INSTR IN
t
PLIV
t
LHLL
t
PLPH
t
LLIV
t
PLAZ
t
LLPL
t
AVIV
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
68
ALE
PSEN
PORT 0
PORT 2
Figure 61. External Data Memory Read Cycle
RD
A0–A7
FROM RI OR DPL
DATA IN A0–A7 FROM PCL INSTR IN
P2.0–P2.7 OR A8–A15 FROM DPH A8–A15 FROM PCH
t
WHLH
t
LLDV
t
LLWL
t
RLRH
t
LLAX
t
RLAZ
t
AVLL
t
RHDX
t
RHDZ
t
AVWL
t
AVDV
t
RLDV
t
LLAX
ALE
PSEN
PORT 0
PORT 2
Figure 62. External Data Memory Write Cycle
WR
A0–A7
FROM RI OR DPL
DATA OUT A0–A7 FROM PCL INSTR IN
P2.0–P2.7 OR A8–A15 FROM DPH A8–A15 FROM PCH
t
WHLH
t
LLWL
t
WLWH
t
AVLL
t
AVWL
t
QVWX
t
WHQX
t
QVWH
Philips Semiconductors Product specification
P83C557E4/P80C557E4/P89C557E4Single-chip 8-bit microcontroller
1999 Mar 02
69
Figure 63. Timing SIO1 (I
2
C) Interface
t
RD
t
SU;STA
t
BUF
t
SU;
STO
0.3 V
DD
0.7 V
DD
0.3 V
DD
t
FD
t
RC
t
FC
t
HIGH
t
LOW
t
HD;STA
t
SU;DAT1
t
HD;DAT
t
SU;DAT2
t
SU;DAT3
START condition
repeated START condition
SDA
(INPUT/OUTPUT)
SCL
(INPUT/OUTPUT)
STOP condition
START or repeated START condition
0.7 V
DD
t
SP
Figure 64. UART waveforms in Shift Register Mode
012345678
INSTRUCTION
ALE
CLOCK
OUTPUT DATA
WRITE TO SBUF
INPUT DATA
CLEAR RI
VALID VALID VALID VALID VALID VALID VALID VALID
SET TI
SET RI
t
XLXL
t
QVXH
t
XHQX
t
XHDX
t
XHDV
01234567
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72

P80C557E4EFB/01,51

Mfr. #:
Buy P80C557E4EFB/01,51
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU SINGLE-CHIP 8-BIT MCU
Lifecycle:
New from this manufacturer.
Delivery:
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