LTC3613
25
3613fa
APPLICATIONS INFORMATION
In some applications, a more severe transient can be caused
by switching in loads with large (>10F) input capacitors.
If the switch connecting the load has low resistance and
is driven quickly, then the discharged input capacitors are
effectively put in parallel with C
OUT
, causing a rapid drop in
V
OUT
. No regulator can deliver enough current to prevent
this problem. The solution is to limit the turn-on speed of
the load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rent limiting, short-circuit protection and soft starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power. Although all dissipative elements in
the circuit produce losses, four main sources account for
most of the losses:
1. I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause
the efficiency to drop at high output currents. In
continuous mode the average output current flows
though the inductor L, but is chopped between the
top and bottom MOSFETs.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V.
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents. The MOSFET driver current re-
sults from switching the gate capacitance of the power
MOSFETs. Each time a MOSFET gate is switched from
low to high to low again, a packet of charge, dQ, moves
from INTV
CC
to ground. The resulting dQ/dt is a current
out of INTV
CC
that is typically much larger than the
controller I
Q
current.
Supplying INTV
CC
power through EXTV
CC
could save
several points of efficiency, especially for high V
IN
ap-
plications. Connecting EXTV
CC
to an output-derived
source will scale the V
IN
current required for the driver
and controller circuits by a factor of Duty Cycle/Effi-
ciency. For example, in a 20V to 5V application, 10mA
of INTV
CC
current results in approximately 2.5mA of V
IN
current. This reduces the mid-current loss from 10%
or more (if the driver was powered directly from V
IN
)
to only a few percent.
4. C
IN
loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I
2
R loss
and sufficient capacitance to prevent the RMS current
from causing additional upstream losses in cabling,
fuses or batteries.
Other losses, which include the C
OUT
ESR loss, bottom
MOSFET reverse-recovery loss and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current there is no change in efficiency.
Power losses in the switching regulator will reflect as a
longer than ideal on-time. This efficiency accounted on-
time in continuous mode can be calculated as:
t
ON(REAL)
t
ON(IDEAL)
Efficiency
LTC3613
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APPLICATIONS INFORMATION
Design Example
Consider a step-down converter with V
IN
= 6V to 24V, V
OUT
= 1.2V, I
OUT(MAX)
= 15A, and f = 350kHz (see Figure 9).
The regulated output voltage is determined by:
V
OUT
=0.6V 1+
R
FB2
R
FB1
Using a 20k resistor from V
OSNS
+
to V
OSNS
, the top
feedback resistor is also 20k.
The frequency is programmed by:
R
T
kΩ
[]
=
41550
fkHz
[]
–2.2=
41550
350
–2.2116.5k
Select the nearest standard value of 115k.
The minimum on-time occurs for maximum V
IN
and should
be greater than 65ns, which is the best that the LTC3613
can achieve. The minimum on-time for this application is:
t
ON(MIN)
=
V
OUT
V
IN(MAX)
f
=
1.2V
24V350kHz
143ns
Set the inductor value to give 40% ripple current at maxi-
mum V
IN
:
L=
1.2V
350kHz 40%15A
1–
1.2V
24V
0.54µH
Select 0.56H, which is the nearest standard value.
PV
IN
SV
IN
V
OUT
PGOOD
RUN
V
RNG
SENSE
SENSE
+
R
PGD
100k
INTV
CC
R
ITH
28k
R
T
115k
R
DCR
3.09k
LTC3613
R
FB2
20k
R
FB1
20k
C
OUT1
330µF
2.5V
×2
C
OUT2
100µF
×2
L1
0.56µH
SW
D
B
C
SS
0.1µF
R
DIV1
52.3k
R
DIV2
10k
C
ITH1
220pF
C
ITH2
100pF
3613 F10
V
IN
6V TO 24V
V
OUT
1.2V
15A
C
DCR
0.1µF
C
B
0.1µF
C
VCC
4.7µF
C
IN1
: SANYO 25SVPD82M
C
OUT1
: SANYO 2R5TPE330M9
D
B
: CENTRAL CMDSH-3
L1: VISHAY IHLP4040DZ-056µH
TRACK/SS
ITH
RT
MODE/PLLIN
EXTV
CC
SGND
BOOST
INTV
CC
INTV
CC
PGND
V
OSNS
+
V
OSNS
C
IN2
10µF
C
IN1
82µF
25V
+
+
350kHz
LOAD CURRENT (A)
0.1
40
EFFICIENCY (%)
60
70
80
100
1 10 100
3613 F10a
20
30
50
90
10
0
V
IN
= 12V
V
OUT
= 1.2V
PULSE-SKIPPING
MODE
FORCED
CONTINUOUS
MODE
Figure 9. 1.2V, 15A, 350kHz Step-Down Converter
LTC3613
27
3613fa
APPLICATIONS INFORMATION
The resulting maximum ripple current is:
ΔI
L
=
1.2V
350kHz0.56µH
1–
1.2V
24V
5.8A
Often in high power applications, DCR current sensing is
preferred over R
SENSE
in order to maximize efficiency. In
order to determine the DCR filter values, first the induc-
tor manufacturer has to be chosen. For this design, the
Vishay IHLP-4040DZ-01 model is chosen with a value of
0.56H and DCR
MAX
=1.8m. This implies that:
V
SENSE(MAX)
= DCR
MAX
at 25°C • [1 + 0.4% (T
L(MAX)
– 25°C)] • [I
OUT(MAX)
ΔI
L
/2]
= 1.8m • [1 + 0.4% (100°C – 25°C)] •
[15A – 5.8A/2]
28.3mV
The maximum sense voltage is within the range that
LTC3613 can handle without any additional scaling. There-
fore, the DCR filter consists of a simple RC filter across
the inductor. If the C is chosen to be 0.1µF, then the R can
be calculated as:
R
DCR
=
L
DCR
MAX
C
DCR
=
0.56µH
1.8mΩ•0.1µF
3.11k
The closest standard value is 3.09k.
The resulting value of V
RNG
with a 50% design margin
factor is:
V
RNG
= V
SENSE(MAX)
/0.05 • MF
= 28.3mV/0.05 • 1.5 ≈ 850mV
To generate the V
RNG
voltage, connect a resistive divider
from INTV
CC
to SGND with R
DIV1
= 52.3k and R
DIV2
= 10k.
Select C
IN
to give an RMS current rating greater than 7A
at 75°C. The output capacitor C
OUT
is chosen for a low
ESR of 4.5m to minimize output voltage changes due to
inductor ripple current and load steps. The output voltage
ripple is given as:
ΔV
OUT(RIPPLE)
= ΔI
L(MAX)
• ESR = (5.8A)(4.5m)
26mV
However, a 0A to 10A load step will cause an output
change of up to:
ΔV
OUT(STEP)
= ΔI
LOAD
• ESR = (10A)(4.5m) = 45mV
Optional 100F ceramic output capacitors are included to
minimize the effect of ESR and ESL in the output ripple
and to improve load step response.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3613.
Multilayer boards with dedicated ground layers are
preferable for reduced noise and for heat sinking pur-
poses. Use wide rails and/or entire planes for V
IN
, V
OUT
and PGND nodes for good filtering and minimal copper
loss. Flood unused areas of all layers with copper for
better heat sinking.
Keep signal and power grounds separate except at the
point where they are shorted together. Short signal and
power ground together only at a single point with a nar-
row PCB trace (or single via in a multilayer board). All
power train components should be referenced to power
ground and all small-signal components (e.g., C
ITH1
,
R
T
, C
SS
etc.) should be referenced to signal ground.
Place C
IN
, inductor, sense resistor (if used), and primary
C
OUT
capacitors close together in one compact area.
The SW node should be compact but be large enough
to handle the inductor currents without large copper
losses. Connect PV
IN
as close as possible to the (+)
plate of C
IN
capacitor(s) that provides the bulk of the
AC current (these are normally the ceramic capaci-
tors), and connect PGND as close as possible to the
(–) terminal of the same C
IN
capacitor(s). The high dI/
dt loop formed by C
IN
, the top MOSFET, and the bot-
tom MOSFET should have short leads and PCB trace
lengths to minimize high frequency EMI and voltage
stress from inductive ringing. The (–) terminal of the
primary C
OUT
capacitor(s) which filter the bulk of the
inductor ripple current (these are normally the ceramic
capacitors) should also be connected close to the (–)
terminal of C
IN
.

LTC3613IWKH#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Fast, Accurate, Monolithic Step-Down Regulator with Differential Output Sensing
Lifecycle:
New from this manufacturer.
Delivery:
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