CY7C130, CY7C130A
CY7C131, CY7C131A
Document Number: 38-06002 Rev. *H Page 8 of 22
Busy/Interrupt Timing
t
BLA
BUSY LOW from address match – 15–20–20ns
t
BHA
BUSY HIGH from address mismatch
[20]
– 15–20–20ns
t
BLC
BUSY LOW from CE LOW – 15–20–20ns
t
BHC
BUSY HIGH from CE HIGH
[20]
– 15–20–20ns
t
PS
Port set-up for priority 5 –5–5–ns
t
WB
[21]
R/W LOW after BUSY LOW 0 –0–0–ns
t
WH
R/W HIGH after BUSY HIGH 13 –20–30–ns
t
BDD
BUSY HIGH to valid data – 15–25–30ns
t
DDD
Write data valid to read data valid – Note 22 – Note 22 – Note 22 ns
t
WDD
Write pulse to data delay – Note 22 – Note 22 – Note 22 ns
Interrupt Timing
t
WINS
R/W to INTERRUPT set time – 15–25–25ns
t
EINS
CE to INTERRUPT set time – 15–25–25ns
t
INS
Address to INTERRUPT set time – 15–25–25ns
t
OINR
OE to INTERRUPT reset time
[20]
– 15–25–25ns
t
EINR
CE to INTERRUPT reset time
[20]
– 15–25–25ns
t
INR
Address to INTERRUPT reset time
[20]
– 15–25–25ns
Shaded areas contain preliminary information.
Switching Characteristics
Over the Operating Range
[12, 13]
(continued)
Parameter Description
7C131-15
[14]
7C131A-15
7C141-15
7C130-25
[14]
7C131-25
7C140-25
7C141-25
7C130-30
7C130A-30
7C131-30
7C140-30
7C141-30
Unit
Min Max Min Max Min Max
Notes
20. These parameters are measured from the input signal changing, until the output pin goes to a high-impedance state.
21. CY7C140/CY7C141 only.
22. A write operation on Port A, where Port A has priority, leaves the data on Port B’s outputs undisturbed until one access time after one of the following:
BUSY
on Port B goes HIGH.
Port B’s address is toggled.
CE
for Port B is toggled.
R/W
for Port B is toggled during valid read.