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LC75841PES-H

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
LC75841PE
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10
Serial Data Transfer Formats (When in 842 mode data transfer)
(1) 1/2 duty drive mode (When in 842 mode data transfer)
1. When CL is stopped at the low level
2. When CL is stopped at the high level
Note: DD is the direction data.
• CCB address ....... "44H"
• D1 to D54 ......... Display data
• BU ...................... Normal mode/power-saving mode control data
• SC ...................... Segments on/off control data
B1 B0
D2 D1
0 0
D18 BU D28
DI
CL
CE
0 0 0
D21
1 0 1
B3 B2 A1 A0 A3 A2
D19 D23 D22 D24 D27 D25
0 0
SC D26 D20 D15 D16 D17
B1 B0
0 0
D30
D29
0
0 0 0
D52
1 0 1
B3 B2 A1 A0 A3 A2
D48 D47 D54 D53
0 0 0 1 0
D49 D51 D50 D45 D46 D43 D44
DD
1bit
Control
data
3 bits
Display data
28 bits
CCB address
8 bits
DD
1bit
Fixed data
5 bits
Display data
26 bits
CCB address
8 bits
B1 B0
D2 D1
0 0 0 0 0
D21 D16 D15
DI
CL
CE
B3 B2 A1 A0 A3 A2
1 0 1
D18 D17 D20 D19 D23 D22 D24 BU D28 D27 D26
0
SC
0
D25
B1 B0
0 0 0 0 0
D49 D44 D30 D29
B3 B2 A1 A0 A3 A2
1 0 1
D51 D50
0 0 0
D48 D47 D46 D45
0 1
D52 D54 D53
0
D43
DD
1 bit
Control
data
3 bits
Display data
28 bits
CCB address
8 bits
DD
1 bit
Fixed data
5 bits
Display data
26 bits
CCB address
8 bits
LC75841PE
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11
Serial Data Transfer Examples
(1) Static drive mode
The serial data shown in the figure below must be sent.
(2) 1/2 duty drive mode
• When 29 or more segments are used
96 bits of serial data (including CCB address bits) must be sent.
• When fewer than 29 segments are used
The serial data shown below (the D1 to D28 display data and the control data) must always be sent.
Serial Data Transfer Examples (When in 842 mode data transfer)
(1) 1/2 duty drive mode (When in 842 mode data transfer)
• When 29 or more segments are used
80 bits of serial data (including CCB address bits) must be sent.
• When fewer than 29 segments are used
The serial data shown in the figure below (the D1 to D28 display data, and the control data) must be sent.
40 bits 8 bits
D2 D1
D15
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D16 D17 D18 D19 D20 D21 D22 D23 D24 D26
DT
D27 D28
0 P0 P1 P2
FC0 FC1 FC2
OC SC BU 0
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D29 D30 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54
0 0 0 0 0 0 0 0 0 0 0 0 0
D25
1
40 bits 8 bits
D2 D1
D15
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D16 D17 D18 D19 D21 D22 D23 D24 D26
DT
D27 D28
0 P0 P1 P2
FC0 FC1 FC2
OC SC BU 0
D25 D20
40 bits 8 bits
D2 D1
D15
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D16 D17 D18 D19 D21 D22 D23 D24 D26
DT
D27
0 0 P0 P1 P2
FC0 FC1 FC2
OC SC BU 0
D25 D20
32 bits 8 bits
D2 D1
D15
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D16 D17 D18 D19 D21 D22 D23 D24 D26 D27 D28
BU SC 0 0
D25 D20
32 bits 8 bits
D2 D1
D15
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D16 D17 D18 D19 D20 D21 D22 D23 D24 D26 D27 D28
BU SC 0 0
0 0 1 0 0 0 1 0
B0 B1 B2 B3 A0 A1 A2 A3
D29 D30 D43 D44 D45 D46 D47 D48 D49 D50 D51 D52 D53 D54
0 0 0 0 0 1
D25
LC75841PE
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12
Control Data Functions
1. P0 to P2: Segment output port/general-purpose output port switching control data
These control data bits switch the segment output port/general-purpose output port functions of the S1/P1 to S4/P4
output pins.
However, segment output port is forcibly selected when in 842 mode data transfer.
Control data Output pin state
P0 P1 P2 S1/P1 S2/P2 S3/P3 S4/P4
0 0 0 S1 S2 S3 S4
0 0 1 P1 S2 S3 S4
0 1 0 P1 P2 S3 S4
0 1 1 P1 P2 P3 S4
1 0 0 P1 P2 P3 P4
Note: Sn (n = 1 to 4): Segment output ports
Pn (n = 1 to 4): General-purpose output ports
Note that when the general-purpose output port function is selected, the correspondence between the output pins and
the display data will be that shown in the table.
Output pin
Corresponding display data
Static drive mode 1/2 duty drive mode
S1/P1 D1 D1
S2/P2 D2 D3
S3/P3 D3 D5
S4/P4 D4 D7
For example, if the general-purpose output port function is selected for the S4/P4 output pin in 1/2 duty drive mode,
it will output a high level (V
DD
) when display data D7 is 1, and a low level (V
SS
) when D7 is 0.
2. DT: Static drive mode or 1/2 duty drive mode switching control data
This control data bit selects either static drive mode or 1/2 duty drive mode.
However, 1/2 duty drive mode is forcibly selected when in 842 mode data transfer.
DT Duty drive mode Output pin state (COM2)
0 Static drive mode V
SS
level
1 1/2 duty drive mode COM2
Note: COM2…Common output
3. FC0 to FC2: Common/segment output waveform frame frequency control data
These control data bits set the frame frequency of the common and segment output waveforms.
However, fo=fosc/384 is forcibly selected when in 842 mode data transfer.
Control data
Frame frequency fo [Hz]
FC0 FC1 FC2
1 1 0 fosc/768, f
CK
/768
1 1 1 fosc/576, f
CK
/576
0 0 0 fosc/384, f
CK
/384
0 0 1 fosc/288, f
CK
/288
0 1 0 fosc/192, f
CK
/192
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

LC75841PES-H

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Manufacturer:
ON Semiconductor
Description:
LCD Drivers LCD DISPLAY DRIVER
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