DS1135
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TERMINOLOGY
Period: The time elapsed between the leading edge of the first pulse and the leading edge of the
following pulse.
t
WI
(Pulse Width): The elapsed time on the pulse between the 1.5-volt point on the leading edge and the
1.5-volt point on the trailing edge or the 1.5-volt point on the trailing edge and the 1.5-volt point on the
leading edge.
t
RISE
(Input Rise Time): The elapsed time between the 20% and the 80% point on the leading edge of the
input pulse.
t
FALL
(Input Fall Time): The elapsed time between the 80% and the 20% point on the trailing edge on the
input pulse.
t
PLH
(Time Delay, Rising): The elapsed time between the 1.5-volt point on the leading edge of the input
pulse and the 1.5-volt point on the leading edge of the output pulse.
t
PHL
(Time Delay, Falling): The elapsed time between the 1.5-volt point on the falling edge of the input
pulse and the 1.5-volt point on the falling edge of the output pulse.
ORDERING INFORMATION
PACKAGE INFORMATION
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of
RoHS status.
8 SO S8+2
21-0041
90-0096
TIME DELAY (ns): 6, 8, 10, 12, 15, 20,
Z = SOIC (150-MIL)