7
Pin Description
VIN - Supply voltage for the IC. It is recommended to place a
1µF decoupling capacitor as close as possible to the IC.
GND - Small signal ground for the PWM controller stage. All
internal control circuits are referenced to this pin.
PG - The Power good is an open-drain output. A pull-up
resistor should be connected between PG and VIN. It is
asserted active high when the output voltage reaches
94.5% of the nominal value.
FB - The Feedback pin is used to sense the output voltage,
and should be connected to VOUT for normal operation.
VSET - This pin is used to program the output voltages.
Refer to Table 1 below for details.
SYNC - This pin is used for synchronization. The converter
switching frequency can be synchronized to an external
CMOS clock signal in the range of (500kHz to 1MHz).
EN - A logic high enables the converter, logic low forces the
device into shutdown mode reducing the supply current to
less than 10
µA at 25°C. This pin should be pulled up to VCC
via a 10K resistor.
L - This pin is the drain junction of the internal power
MOSFETs and is to be connected to the external inductor.
PGND - Power ground. Connect all power grounds to this pin.
PVCC - This pin provides the Input supply for the internal
MOSFETs. It is recommended to place a 1µF decoupling
capacitor as close as possible to the IC.
CT - Timing capacitor connection to set the 25ms minimum
pulse width for the RESET
signal.
RESET - The outputs of the reset supervisory circuit, which
monitors VIN. The IC asserts these RESET
signals
whenever the supply voltage drops below a preset threshold
and keeps it asserted for at least 25ms after VCC (VIN) has
risen above the reset threshold. These outputs are push-
pull. RESET
is LOW when re-setting the microprocessor.
The PWM will continue to operate until VIN drops below the
UVLO threshold.
Functional Description
The ISL6410, ISL6410A is a synchronous buck regulator
with integrated N- and P-channel power MOSFET and
provides pre-set pin programmable outputs. Synchronous
rectification with internal MOSFETs is used to achieve higher
efficiency and reduced number of external components.
Operating frequency of 750kHz typical allows the use of
small inductor and capacitor values. The device can be
synchronized to an external clock signal in the range of
500kHz to 1MHz. The PG output indicates loss of regulation
on PWM output.
The PWM is based on the peak current mode control
topology with internal slope compensation. At the beginning
of each clock cycle, the high side P-channel MOSFET is
turned on. The current in the inductor ramps up and is
sensed via an internal circuit. On exceeding a preset limit the
high side switch is turned off causing the PWM comparator
to trip. This occurs whenever the output voltage is in
regulation or when the inductor current reaches the current
limit. After a minimum dead time to prevent shoot through
current, the low side N-channel MOSFET turns on and the
current ramps down. As the clock cycle is completed, the low
side switch turns off and the next clock cycle is initiated.
The control loop is internally compensated thus reducing the
amount of external components.
The switch current is internally sensed and the maximum
current limit is 1300mA peak.
Synchronization
The typical operating frequency for the converter is 750kHz.
It is possible to synchronize the converter to an external
clock frequency in the range of 500kHz to 1000kHz when an
external signal is applied to SYNC pin. The device will
automatically detect and synchronize to the rising edge of
the first clock pulse. If the clock signal is stopped, the
converter automatically switches back to the internal clock
and continues its operation without interruption. The switch
over will be initiated if no rising edge triggers are present on
the SYNC pin for a duration of four clock cycles.
Soft-Start
As the EN (Enable) pin goes high, the soft-start function will
generate an internal voltage ramp. This causes the start-up
current to slowly rise preventing output voltage overshoot
and high inrush currents. The soft-start duration is typically
5.5ms with 750kHz switching frequency. When the soft-start
is completed, the error amplifier will be connected directly to
the internal voltage reference.
Enable
Logic low on EN pin forces the PWM section into shutdown.
In the shutdown mode all the major blocks of the PWM
including power switches, drivers, voltage reference, and
oscillator are turned off.
Undervoltage Lockout
An undervoltage lockout circuit prevents the converter from
turning on when the voltage on VIN is less than the values
specified in the Input UVLO Threshold section of the
electrical specification.
TABLE 1.
VSET
ISL6410
Vo
ISL6410A
Vo
High 1.8V 3.3V
Open (NC) 1.5V 1.8V
Low 1.2V 1.2V
ISL6410, ISL6410A
8
Power Good
This output is asserted high when the PWM is enabled, and
Vout is within 8.0% typical of its final value, and is active low
outside this range. When disabled, the output turns active
low. It is recommended to leave the PG pin unconnected
when not used.
PWM Overvoltage and Overcurrent Protection
The PWM output current is sampled at the end of each PWM
cycle, exceeding the overcurrent limit, causes a 4 bit
up/down counter to increment by one LSB. A normal current
state causes the counter to decrement by one LSB (the
counter will not however “rollover” or count below 0000).
When the PWM goes into overcurrent, the counter rapidly
reaches count 1111 and the PWM output is shut down and
the soft-start counter is reset. After 16 clocks the PWM
output is enabled and the soft-start cycle is started.
If Vout exceeds the overvoltage limit for 32 consecutive clock
cycles the PWM output is shut off and the soft-start cycle is
initiated.
No Load Operation
If there is no load connected to the output, the converter will
regulate the output voltage by allowing the inductor current
to reverse for a short period of time.
Output Capacitor Selection
For best performance, a low ESR output capacitor is
needed. Output voltages below 1.8V require a larger output
capacitor and ESR value to improve the performance and
stability of the converter. For 1.8V output applications, a
ceramic capacitor of 10µF or higher value with ESR 50m
is recommended.
The RMS ripple current is calculated as:
L = the inductor value
f = the switching frequency
The overall output ripple voltage is the sum of the voltage spike
caused by the output capacitor ESR and the voltage ripple
caused by charge and discharge of the output capacitor:
Where the highest output voltage ripple occurs at the highest
input voltage VIN.
Input Capacitor Selection
The input current to the buck converter is pulsed, and
therefore a low ESR input capacitor is required. This results
in good input voltage filtering and minimizes the interference
it causes to other circuits. The input capacitor should have a
minimum value of 10µF and a higher value can be selected
for improving input voltage filtering. The input capacitor
should be rated for the maximum input ripple current
calculated as:
The worst case RMS ripple current occurs at D = 0.5 and is
calculated as: Irms = Io/2.
D = Duty Cycle
Ceramic capacitors are preferred because of their low ESR
value. They are also less sensitive to voltage transients
when compared to tantalum capacitors. It is good practice to
place the input capacitor as close as possible to the input pin
of the IC for optimum performance.
Inductor Selection
The ISL6410 is an internally compensated device and hence
a minimum of 8.2
µH must be used for the ISL6410 and a
minimum of 12
µH for the ISL6410A. The selected inductor
must have a low DC resistance and a saturation current
greater than the maximum inductor current value can be
calculated from the equations below
where
dIL = the peak to peak inductor current
L = the inductor value
f = the switching frequency
ILmax = the max inductor current
TABLE 2. RECOMMENDED OUTPUT CAPACITORS
CAPACITOR
VALUE
ESR
(mΩ)
COMPONENT
SUPPLIER COMMENTS
10µF <50 AVX 08056D106KAT2A Ceramic
I
RMS Co()
Vo
1
Vo
Vin
---------
Lf×
-------------------
1
23×
-----------------
××=
Vo Vo
1
Vo
Vin
---------
Lf×
-------------------
1
8Cof××
------------------------- ESR+


××=
TABLE 3. RECOMMENDED INDUCTORS
INDUCTOR VALUE DCR (mΩ)
COMPONENT
SUPPLIER
8.2µH75Coilcraft
MSS6122-822MX
12µH 100 Coilcraft
MSS6122-123MX
I
RMS
Io max()
Vo
Vin
---------
1
Vo
Vin
---------


××=
dIL Vo
1
Vo
Vin
---------
Lf×
-------------------
×=
IL max Io max
dIL
2
---------+=
ISL6410, ISL6410A
9
Layout Considerations
As in all switching power supplies, the layout is an important
step in the design process, more so at high peak currents
and switching frequencies. Improper layout practice will give
rise to Stability and EMI issues. It is recommended that wide
and short traces are used for the main current paths. The
input capacitor should be placed as close as possible to the
IC pins. This applies to the output inductor and capacitor as
well. The analog ground, GND, and the power ground,
PGND, need to be separated. Use a common ground node
to minimize the effects of ground noise.
Performance Curves and Waveforms
FIGURE 4. ISL6410 EFFICIENCY vs LOAD CURRENT FIGURE 5. ISL6410 VIN vs EFFICIENCY
FIGURE 6. ISL6410A EFFICIENCY vs LOAD CURRENT FIGURE 7. ISL6410A EFFICIENCY vs VIN
100010050
100
80
50
IOUT LOAD CURRENT (mA)
EFFICIENCY (%)
90
70
60
VOUT = 1.8V
VOUT = 1.2V
VOUT = 1.5V
3.32.9
90
80
70
60
VIN INPUT VOLTAGE (V)
EFFICIENCY (%)
3.1 3.5
50
IOUT = 200mA
IOUT = 600mA
100
100010050
100
80
50
IOUT LOAD CURRENT (mA)
EFFICIENCY (%)
90
70
60
VOUT = 3.3V
VOUT = 1.2V
VOUT = 1.8V
5.65.04.4
VIN (V)
EFFICIENCY (%)
4.8 5.2
4.6
5.4
90
80
70
60
50
100
IOUT = 600mA
IOUT = 200mA
ISL6410, ISL6410A

ISL6410IUZ-T5K

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Voltage Regulators SYNC BUCK PWMG FOR 3 3V INPUT 10LD 5K
Lifecycle:
New from this manufacturer.
Delivery:
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