EVENT# Pin
The temperature sensor also adds the EVENT# pin (open-drain). Not used by the SPD
EEPROM, EVENT# is a temperature sensor output used to flag critical events that can be
set up in the sensor’s configuration register.
EVENT# has three defined modes of operation: interrupt mode, compare mode, and
critical temperature mode. Event thresholds are programmed in the 0x01 register using
a hysteresis. The alarm window provides a comparison window, with upper and lower
limits set in the alarm upper boundary register and the alarm lower boundary register,
respectively. When the alarm window is enabled, EVENT# will trigger whenever the
temperature is outside the MIN or MAX values set by the user.
The interrupt mode enables software to reset EVENT# after a critical temperature
threshold has been detected. Threshold points are set in the configuration register by
the user. This mode triggers the critical temperature limit and both the MIN and MAX of
the temperature window.
The compare mode is similar to the interrupt mode, except EVENT# cannot be reset by
the user and returns to the logic HIGH state only when the temperature falls below the
programmed thresholds.
Critical temperature mode triggers EVENT# only when the temperature has exceeded
the programmed critical trip point. When the critical trip point has been reached, the
temperature sensor goes into comparator mode, and the critical EVENT# cannot be
cleared through software.
2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
PDF: 09005aef837c3c22
jdf18c256_512x72pdz.pdf – Rev. D 12/11 EN
19
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
DRAFT: 12/19/2011
Module Dimensions
Figure 3: 240-Pin DDR3 VLP RDIMM
18.9 (0.744)
18.6 (0.732)
Pin 1
2.5 (0.098) D
(2X)
2.3 (0.091) TYP
5.0 (0.197) TYP
123.0 (4.84)
TYP
1.0 (0.039)
TYP
0.8 (0.031)
TYP
0.75 (0.03) R
(6X)
0.76 (0.03) R
Pin 120
Front view
133.50 (5.256)
133.20 (5.244)
47.0 (1.85)
TYP
71.0 (2.79)
TYP
9.5 (0.374)
TYP
Back view
Pin 240
Pin 121
1.37 (0.054)
1.17 (0.046)
4.0 (0.157)
MAX
2.2 (0.087) TYP
1.45 (0.057) TYP
3.05 (0.12) TYP
54.68 (2.15)
TYP
3.0 (0.118) 4X TYP
U1 U2 U3
U4
U5
U6
U7 U8 U9
U10
U11 U12
U13
U14
U15
U16 U17 U18 U19 U20
Notes:
1. All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted.
2. The dimensional diagram is for reference only.
2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM
Module Dimensions
PDF: 09005aef837c3c22
jdf18c256_512x72pdz.pdf – Rev. D 12/11 EN
20
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
DRAFT: 12/19/2011
Revision History
Rev. D – 12/11
Updated 2GB IDDs with die revision 'G' (V68A:G) values
Added 4GB die revision 'M' (V79D:M) IDD table
Rev. C – 8/10
Updated with new, approved common topics.
Updated TBD values for I
DD
s.
Rev. B – 11/09
Updated document format.
Updated parameters with subscripts throughout document.
Document name in header: Changed QR to DR.
240-Pin VLP RDIMM (MO-269 R/C L) figure: Changed PCB height to Module height.
Options/Marking table: Deleted industrial temperature and marking; deleted 1G0,
80C, and 80B; deleted notes 1 and 2.
Part Numbers and Timing Parameters – 2GB table: Deleted industrial temperature (I)
option; deleted 1G3, 1G0, 80C, 80B.
Part Numbers and Timing Parameters – 4GB table: Deleted industrial temperature (I)
option; deleted 1G3, 1G0, 80C, 80B.
Pin Assignments table: Changed the following pin assignments: 167 to NC.
Pin Descriptions table: Address inputs: Added “A[14:0] address the 2Gb DDR3 devi-
ces;” Serial data: Deleted “on the module;” NU: Deleted.
Component-to-Module DQ Map table: Added U14 and U16; changed U12 module pin
number 06 to 106.
Functional Block Diagram figure: Updated with TDQS and NF/TDQS#.
Operating Conditions table: Deleted industrial temperatures; changed I
VREF
Max to
+18.
DDR3 I
DD
Specifications and Conditions – 2GB table: Deleted 800 column; changed
slow exit symbol to I
DD2P0
; changed fast exit symbol to I
DD2P1
.
DDR3 I
DD
Specifications and Conditions – 4GB table: Deleted 800 column; changed
slow exit symbol to I
DD2P0
; changed fast exit symbol to I
DD2P1
; updated I
DD
values in
333 and 1066 columns.
Rev. A – 4/09
Initial release; PCB 0779 referenced.
8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900
www.micron.com/productsupport Customer Comment Line: 800-932-4992
Micron and the Micron logo are trademarks of Micron Technology, Inc.
All other trademarks are the property of their respective owners.
This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein.
Although considered final, these specifications are subject to change, as further product development and data characterization some-
times occur.
2GB, 4GB (x72, ECC, DR) 240-Pin DDR3 SDRAM VLP RDIMM
Revision History
PDF: 09005aef837c3c22
jdf18c256_512x72pdz.pdf – Rev. D 12/11 EN
21
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
DRAFT: 12/19/2011

MT18JDF51272PDZ-1G6K1

Mfr. #:
Manufacturer:
Micron
Description:
MODULE DDR3 SDRAM 4GB 240RDIMM
Lifecycle:
New from this manufacturer.
Delivery:
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