AD8021
Rev. F | Page 17 of 28
TEST CIRCUITS
50Ω
–V
S
C
C
+V
S
5
R
S
R
O
R
D
R
F
C
F
R
G
R
IN
49.9Ω
50Ω CABLE
50Ω CABLE
01888-048
Figure 48. Noninverting Gain
FET
PROBE
5
50Ω
–V
S
C
C
+V
S
R
S
R
L
R
F
C
F
R
G
R
IN
49.9Ω
50Ω CABLE
C
L
01888-049
Figure 49. Noninverting Gain and FET Probe
5
50Ω
–V
S
C
C
+V
S
R
O
R
F
R
D
R
G
R
IN
49.9Ω
50Ω CABLE
49.9Ω
50Ω CABLE
01888-050
Figure 50. Inverting Gain
01888-051
HP8753D
50Ω
AD8021
499Ω499Ω
55.6Ω
499Ω
499Ω
49.9Ω
NETWORK
ANALYZER
C
C
5
+V
S
7pF
50Ω
–V
S
Figure 51. CMRR
5
HP8753D
AD8021
100Ω
NETWORK
ANALYZER
C
C
+V
S
50Ω
–V
S
7pF
R
G
499Ω
R
F
499Ω
01888-052
Figure 52. Output Impedance, Chip Enabled
01888-053
499Ω
AD8021
49.9Ω
49.9Ω
7pF
C
C
5
976Ω
1
8
1.0V
49.9Ω
499Ω
4V
53.6Ω
+V
S
–V
S
LOGIC REF
DISABLE
Figure 53. Enable/Disable
01888-054
7pF
5
1
8
HP8753D
50Ω
AD8021
499Ω499Ω
1kΩ
49.9Ω
NETWORK
ANALYZER
C
C
+V
S
50Ω
–V
S
49.9Ω
50Ω CABLE
FET
PROBE
LOGIC REF
DISABLE
Figure 54. Input-to-Output Isolation, Chip Disabled
AD8021
1
8
5
7pF
HP8753D
50Ω
100Ω
NETWORK
ANALYZER
C
C
+V
S
–V
S
01888-055
Figure 55. Output Impedance, Chip Disabled
AD8021
Rev. F | Page 18 of 28
5
BIAS
BNC
HP8753D
NETWORK
ANALYZER
50Ω
50Ω
50Ω CABLE
49.9Ω, 5W
+V
S
+V
S
C
C
7pF
499Ω
976Ω
53.6Ω
–V
S
249Ω
499Ω
01888-056
Figure 56. Positive PSRR
49.9Ω
5W
499Ω
50Ω CABLE
–V
S
+V
S
C
C
7pF
499Ω
976Ω
53.6Ω
–V
S
249Ω
BIAS
BNC
HP8753D
NETWORK
ANALYZER
50Ω
50Ω
5
01888-057
Figure 57. Negative PSRR
AD8021
Rev. F | Page 19 of 28
APPLICATIONS
The typical voltage feedback op amp is frequency stabilized
with a fixed internal capacitor, C
INTERNAL
, using dominant pole
compensation. To a first-order approximation, voltage feedback
op amps have a fixed gain bandwidth product. For example, if
its −3 dB bandwidth is 200 MHz for a gain of G = +1; at a gain
of G = +10, its bandwidth is only about 20 MHz. The AD8021 is
a voltage feedback op amp with a minimal C
INTERNAL
of about
1.5 pF. By adding an external compensation capacitor, C
C
, the
user can circumvent the fixed gain bandwidth limitation of
other voltage feedback op amps.
Unlike the typical op amp with fixed compensation, the
AD8021 allows the user to:
Maximize the amplifier bandwidth for closed-loop gains
between 1 and 10, avoiding the usual loss of bandwidth
and slew rate.
Optimize the trade-off between bandwidth and phase
margin for a particular application.
Match bandwidth in gain blocks with different noise gains,
such as when designing differential amplifiers (as shown in
Figure 65).
FREQUENCY (Hz)
1M
OPEN-LOOP GAIN (dB)
100M
110
10k 10M
100
80
60
40
30
10
100k
90
70
50
20
1k 1G 10G
0
–10
180
135
45
90
0
PHASE (Degrees)
(B)
(C)
(A)
(A)
(C)
86
C
C
= 0pF
C
C
= 10pF
01888-058
(B)
Figure 58. Simplified Diagram of Open-Loop Gain and Phase Response
Figure 58 is the AD8021 gain and phase plot that has been
simplified for instructional purposes. Arrow A in
Figure 58
shows a bandwidth of about 200 MHz and a phase margin at
about 60° when the desired closed-loop gain is G = +1 and
the value chosen for the external compensation capacitor is
C
C
= 10 pF. If the gain is changed to G = +10 and C
C
is fixed at
10 pF, then (as expected for a typical op amp) the bandwidth is
degraded to about 20 MHz and the phase margin increases to
90° (Arrow B). However, by reducing C
C
to 0 pF, the bandwidth
and phase margin return to about 200 MHz and 60° (Arrow C),
respectively. In addition, the slew rate is dramatically increased,
as it roughly varies with the inverse of C
C
.
1
2
3
4
5
6
7
8
9
10
0
NOISE GAIN (V/V)
12 3 4 5 6 7 8 91011
01888-059
COMPENSATION CAPACITANCE (pF)
Figure 59. Suggested Compensation Capacitance vs. Gain for
Maintaining 1 dB Peaking
Table 6 and Figure 59 provide recommended values of com-
pensation capacitance at various gains and the corresponding
slew rate, bandwidth, and noise. Note that the value of the
compensation capacitor depends on the circuit noise gain, not
the voltage gain. As shown in
Figure 60, the noise gain, G
N
, of
an op amp gain block is equal to its noninverting voltage gain,
regardless of whether it is actually used for inverting or nonin-
verting gain. Thus,
Noninverting G
N
= R
F
/R
G
+ 1
Inverting G
N
= R
F
/R
G
+ 1
+
+
NONINVERTING
AD8021
3
2
5
6
1
R
S
–V
S
C
COMP
G = G
N
= +5
R
F
1k
R
G
249
AD8021
2
3
5
6
R
F
1k
R
G
249
–V
S
C
COMP
G = –4
G
N
= +5
INVERTING
01888-060
Figure 60. The Noise Gain of Both is 5

AD8021ARMZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers LOW-NOISE 16-Bit
Lifecycle:
New from this manufacturer.
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