MAX7322ATE+T Datasheet MAX7322ATE+T, MAX7322ATE+, MAX7322AEE+ | P7-P9

MAX7322

C Port Expander with

4 Push-Pull Outputs and 4 Inputs

_______________________________________________________________________________________ 7

When the MAX7322 is read through the serial interface

the actual logic levels at the ports are read back.

The four input ports offer latching transition detection

functionality. All input ports are continuously monitored

for changes. An input change sets 1 of 4 flag bits that

identify the changed input(s). All flags are cleared upon

a subsequent read or write transaction to the MAX7322.

A latching interrupt output, INT, is programmed to flag

input data changes on the four input ports through an

interrupt mask register. By default, data changes on any

input port force INT to a logic low. The interrupt output

INT and all transition flags are deasserted when the

MAX7322 is next accessed through the serial interface.

Internal pullup resistors to V+ are selected by the

address select inputs, AD0 and AD2. Pullups are

enabled on the input ports in groups of two (see Table 2).

Output port power-up logic states are selected by the

address select inputs AD0 and AD2. Ports default to

logic-high or logic-low on power-up in groups of two

(see Table 2).

Initial Power-Up

On power-up, the transition detection logic is reset, and

INT is deasserted. The interrupt mask register is set to

0x3C, enabling the interrupt output for transitions on all

four input ports. The transition flags are cleared to indi-

cate no data changes. The power-up default state of

the four push-pull outputs are set according to the I

slave address selection inputs, AD0 and AD2 (Table 2).

Power-On Reset (POR)

The MAX7322 contains an integral POR circuit that

ensures all registers are reset to a known state on

power-up. When V+ rises above V

POR

(1.6V max), the

POR circuit releases the registers and 2-wire interface

for normal operation. When V+ drops to less than V

POR

the MAX7322 resets all register contents to the POR

defaults (Table 2).

RST

Input

The active-low RST input operates as a reset that voids

any current I

C transaction involving the MAX7322,

forcing the MAX7322 into the I

C STOP condition. The

reset action does not clear the interrupt output (INT).

Standby Mode

When the serial interface is idle, the MAX7322 automat-

ically enters standby mode, drawing minimal supply

current.

Slave Address and Input Pullup

Selection/Default Logic State

Address inputs AD0 and AD2 determine the MAX7322

slave address, select which inputs have pullup resis-

tors and set the default logic state for outputs. Pullups

are enabled on the input ports in groups of two (see

Table 2). The MAX7319, MAX7321, MAX7322, and

MAX7323 use a different range of slave addresses

(110xxxx) than the MAX7320 (101xxxx).

The MAX7322 slave address is determined on each I

transmission, regardless of whether the transmission is

actually addressing the MAX7322. The MAX7322 distin-

guishes whether address inputs AD2 and AD0 are con-

nected to SDA or SCL instead of fixed logic levels V+ or

GND during this transmission. This means that the

MAX7322 slave address can be configured dynamically

in the application without cycling the device supply.

PART

SLAVE

ADDRESS

INPUTS

INPUT

INTERRUPT

MASK

OPEN-

DRAIN

OUTPUTS

PUSH-

PULL

OUTPUTS

C DATA

WRITE

C DATA

READ

APPLICATION

16-PORT EXPANDERS

MAX7324 8 Yes — 8 — —

Software equivalent to a

MAX7320 plus a MAX7319.

MAX7325 Up to 8 — Up to 8 8 — —

Software equivalent to a

MAX7320 plus a MAX7321.

MAX7326 4 Yes — 12 — —

Software equivalent to a

MAX7320 plus a MAX7322.

MAX7327

101xxxx

and

110xxxx

Up to 4 — Up to 4 12 — —

Software equivalent to a

MAX7320 plus a MAX7323.

Table 1. MAX7319–MAX7329 Family Comparison (continued)

MAX7322

C Port Expander with

4 Push-Pull Outputs and 4 Inputs

8 _______________________________________________________________________________________

CONNECTION

DEVICE ADDRESS OUTPUTS POWER—UP DEFAULT

40kΩ INPUT PULLUPS

ENABLED

AD2 AD0 A6A5A4A3A2A1A0O7O6I5I4I3I2O1O0O7O6I5I4I3I2O1O0

SCLGND110000011 00 YY——

SCL V+ 110000111 11 YYYY

SCL SCL 1 1 0 0 0 1 0 1 1 1 1 Y Y Y Y

SCL SDA 1 1 0 0 0 1 1 1 1 1 1 Y Y Y Y

SDAGND110010011 0 0 YY——

SDA V+ 110010111 11 YYYY

SDA SCL 1 1 0 0 1 1 0 1 1 1 1 Y Y Y Y

SDA SDA 1 1 0 0 1 1 1 1 1 1 1 Y Y Y Y

GNDGND110100000 0 0 ————

GND V+ 110100100 11 ——YY

GNDSCL 110101000 11 ——YY

GNDSDA110101100 1 1 ——YY

V+ GND110110011 0 0 YY——

V+ V+ 110110111 1 1 YYYY

V+ SCL 110111011 1 1 YYYY

V+ SDA110111111

Inputs

Pullups are not enabled for push-pull outputs

YYYY

Pullups are not enabled for push-pull outputs

Table 2. MAX7322 Address Map

On initial power-up, the MAX7322 cannot decode the

address inputs AD2 and AD0 fully until the first I

transmission. AD0 and AD2 initially appear to be con-

nected to V+ or GND. This is important because the

address selection determines the power-up logic state,

and whether pullups are enabled. However, at power-

up, the I

C SDA and SCL bus interface lines are high

impedance at the pins of every device (master or slave)

connected to the bus, including the MAX7322. This is

guaranteed as part of the I

C specification. Therefore,

address inputs AD2 and AD0 that are connected to

SDA or SCL normally appear at power-up to be connect-

ed to V+. The port selection logic uses AD0 to select

whether pullups are enabled for ports I2 and I3, and to

set the initial logic state for ports O0 and O1. AD2

selects whether pullups are enabled for ports I4 and I5

and sets the internal logic state for ports O6 and O7. The

rule is that a logic-high, SDA, or SCL connection selects

the pullups and sets the default logic state high. A logic-

low deselects the pullups and sets the default logic state

low (Table 2). This means that the port configuration is

correct on power-up for a standard I

C configuration,

where SDA or SCL are pulled up to V+ by the external I

pullup resistors.

There are circumstances where the assumption that

SDA = SCL = V+ on power-up is not true—for example,

in applications in which there is legitimate bus activity

during power-up. Also, if SDA and SCL are terminated

with pullup resistors to a different supply voltage than

the MAX7322’s supply voltage, and if that pullup supply

rises later than the MAX7322’s supply, then SDA or

SCL may appear at power-up to be connected to GND.

In such applications, use the four address combina-

tions that are selected by connecting address inputs

AD2 and AD0 to V+ or GND (shown in bold in Table 2).

These selections are guaranteed to be correct at

power-up, independent of SDA and SCL behavior. If

one of the other 12 address combinations is used, an

unexpected combination of pullups might be asserted

until the first I

C transmission (to any device, not neces-

sarily the MAX7322) is put on the bus, and an unexpect-

ed combination of ports may initialize as logic-low

outputs instead of inputs or logic-high outputs.

Port Inputs

Port inputs switch at CMOS logic levels as determined by

the expander’s supply voltage, and are overvoltage toler-

ant to +6V, independent of the expander’s supply voltage.

Port Input Transition Detection

All four input ports are monitored for changes since the

expander was last accessed through the serial inter-

face. The state of the I/O ports is stored in an internal

MAX7322

C Port Expander with

4 Push-Pull Outputs and 4 Inputs

_______________________________________________________________________________________ 9

“snapshot” register for transition monitoring. The snap-

shot is continuously compared with the actual input

conditions, and if a change is detected for any port

input, then an internal transition flag is set for that port,

and INT is asserted to signal a state change. The four

port inputs are sampled (internally latched into the

snapshot register) and the old transition flags cleared

during the I

C acknowledge of every MAX7322 read

and write access. The previous port transition flags are

read through the serial interface as the second byte of

a 2-byte read sequence.

A long read sequence (more than 2 bytes) can be used

to poll the expander continuously without the overhead

of resending the slave address. If more than 2 bytes

are read from the expander, the expander repeatedly

returns the input port data alternating with the transition

flags. The inputs are repeatedly resampled and the

transition flags repeatedly reset for each pair of bytes

read. All changes that occur during a long read

sequence are detected and reported.

The MAX7322 includes a 4-bit interrupt mask register

that selects which inputs generate an interrupt upon

change. Each input’s transition flag is set when its input

changes, independent of the interrupt mask register

settings. The interrupt mask register allows the proces-

sor to be interrupted for critical events, while the inputs

and the transition flags can be polled periodically to

detect less-critical events.

The INT output is not reasserted during a read sequence

to avoid recursive reentry into an interrupt service rou-

tine. Instead, if a data change occurs that would normal-

ly cause the INT output to be set, the INT assertion is

delayed until the STOP condition. INT is not reasserted

upon a STOP condition if the changed input data is

read before the STOP occurs. The INT logic ensures

that unnecessary interrupts are not asserted, yet data

changes are detected and reported no matter when the

change occurs.

Transition Detection Masks

The transition detection logic incorporates a change

flag and an interrupt mask bit for each of the four input

ports. The four change flags can be read through the

serial interface, and the 4-bit interrupt mask is set

through the serial interface.

Each port’s change flag is set when that port’s input

changes, and the change flag remains set even if the

input returns to its original state. The port’s interrupt

mask determines whether a change on that input port

generates an interrupt. Enable interrupts for high-priori-

ty inputs using the interrupt mask. The interrupt allows

the system to respond quickly to changes on these

inputs. Poll the MAX7322 periodically to monitor less-

important inputs. The change flags indicate whether a

permanent or transient change has occurred on any

input since the MAX7322 was last accessed.

Port Outputs

Write one byte to the MAX7322 to set the output port

levels for the four push-pull outputs, and the interrupt

mask for the four inputs simultaneously.

Serial Interface

Serial Addressing

The MAX7322 operates as a slave that sends and

receives data through an I

C interface. The interface

uses a serial-data line (SDA) and a serial-clock line (SCL)

to achieve bidirectional communication between mas-

ter(s) and slave(s). The master initiates all data transfers

to and from the MAX7322 and generates the SCL clock

that synchronizes the data transfer (Figure 1).

SCL

SDA

BUF

START

CONDITION

STOP

CONDITION

REPEATED START CONDITION

START CONDITION

SU,STO

HD,STA

SU,STA

HD,DAT

SU,DAT

LOW

HIGH

HD,STA

Figure 1. 2-Wire Serial Interface Timing Details

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18

MAX7322ATE+T

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Interface - I/O Expanders I2C Port Expander w/4 P-P Out & 4 In

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MAX7322ATE+T

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