Evaluates: MAX101/MAX101A
MAX101A Evaluation Kit
2 _______________________________________________________________________________________
_________________________Quick Start
1) Plug the termination board into the 96-pin connec-
tor of the MAX101A main board.
2) Use a fan to provide at least 200 lineal feet/min air-
flow to the heatsink of the MAX101A.
3) Connect the power supplies. The power-supply
input pads are in the lower right-hand corner of the
MAX101A main board. The board requires a 20W
power supply that provides +5V and -5.2V with a
common ground.
4) Turn on the -5.2V power supply first, followed by
the +5V power supply. The -5.2V power supply
should be the first supply turned on and the last
supply turned off.
5) Connect a low-phase-jitter RF source with a level
range of -4dBm to +10dBm to the clock input.
6) Connect a test signal to the analog inputs. Use
IN+ and IN- if the signal is differential, or IN+ if the
signal is single-ended (±270mV (MAX101),
±250mV (MAX101A) differential; see the MAX101
or MAX101A data sheet).
7) Observe the digitized results on the termination
board pins by using a logic analyzer, such as the
HP16500 series or an equivalent data-acquisition
system. The outputs are 100k ECL compatible.
_______________Detailed Description
Board Set
The MAX101A EV kit is a two-board set. The main board
contains ECL-interface circuitry and the MAX101A ADC.
The termination board provides high-speed signal termi-
nation and access to the digital data. For further signal
processing, the main board can be plugged into a larger
system board via the provided EURO-card connector.
Clock Input
The external clock input is capacitively coupled to an on-
board bias network. Take care to ensure that the pulse
width is within the specified requirements: clock input
levels should be -4dBm to +10dBm, and clock frequency
can range from 250MHz to 500MHz. Figure 1 in the
MAX101A data sheet shows the necessary timing
requirements for the clock input, as well as the
expected output clock waveforms. The clock input
should be driven by a low-jitter RF signal source. Refer
to Figures 1, 2, and 3 of the MAX101A data sheet for
more information.
Analog Input
Analog input to the MAX101A is made through one or
both of the two SMA coaxial connectors provided (AIN+
and AIN- inputs). Each input is a direct connection to the
ADC, with internal 50Ω terminations provided by the
MAX101A.
Outputs
The MAX101A main board has two 8-bit-wide digital
outputs that are 100k ECL compatible. Each data out-
put is buffered by 100E116 line receivers. There is also
a data clock output (DCLK) provided for timing. All 17
outputs provided to the EURO-card connector are dif-
ferential and unterminated.
The termination board provides a termination for each
data line, through 50Ω to -2V.
ADC Reference Resistor String
An on-board reference supply and op-amp circuit drive
the ADC reference resistor string. The reference sup-
plies can be adjusted using the four potentiometers on
the board (see the
Calibration Procedure
). It is impor-
tant to ensure that a reverse bias condition never occurs
on the reference inputs. Schottky diode clamps on the
reference amp outputs help protect the MAX101A.
DIV 10
The jumper DIV 10 selects the operating mode of the
MAX101A, which can output data either at full speed or
at 1/10 the clock rate. This feature is valuable during
initial testing. DIV 10 is usually left open for normal (full-
DESIGNATION QTY DESCRIPTION
_______Component List (continued)
R6, R7, R17, R18 4 20Ω, 5% resistors
R8, R9, R19, R20 4 12.1kΩ, 1% resistors
R10, R11, R21, R22 4 27.4Ω, 1% resistors
R24, R34, R36 3 82.5Ω, 1% resistors
R25 1 1kΩ, 1% resistor
R26 1 2kΩ trim pot
R27 1 3.16kΩ, 1% resistor
R28, R29, R40–R55 18 100Ω, 5% resistors
R35, R37 2 221Ω, 1% resistors
U1 1 Maxim MAX101ACFR
U2, U4 2
Maxim MAX412CPA high-
speed dual op amps
U3, U5 2
Maxim MX580KH 2.5V
references
U6 1
LM337T negative voltage
regulator
U8, U21–U24 5
MC100E116 quintuple line
receivers