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AD9945KCPZRL7

P1-P3P4-P6P7-P9P10-P12P13-P15
–12–
AD9945
APPLICATIONS INFORMATION
The AD9945 is a complete analog front end (AFE) product for
digital still camera and camcorder applications. As shown in
Figure 10, the CCD image (pixel) data is buffered and sent to the
AD9945 analog input through a series input capacitor. The
AD9945 performs the dc restoration, CDS, gain adjustment, black
level correction, and analog-to-digital conversion. The AD9945’s
digital output data is then processed by the image processing
ASIC. The internal registers of the AD9945—used to control
gain, offset level, and other functions—are programmed by the
ASIC or microprocessor through a 3-wire serial digital interface.
A system timing generator provides the clock signals for both the
CCD and the AFE.
CCD
CCDIN
BUFFER
V
OUT
AD9945
ADC
OUT
REGISTER-
DATA
SERIAL
INTERFACE
DIGITAL
OUTPUTS
DIGITAL IMAGE
PROCESSING
ASIC
TIMING
GENERATOR
V-DRIVE
CCD
TIMING
CDS/CLAMP
TIMING
0.1␮F
Figure 10. System Applications Diagram
REV.
C
AD9945
–13–
24 REFB
23 REFT
22 CCDIN
21 AVSS
D2 1
D3 2
D4 3
32
20 AVDD
19 SHD
18 SHP
17 CLPOB
D5 4
D6 5
D7 6
D8 7
D9 8
31
30 NC
29 NC
28 NC
27 SCK
26 SDATA
25 SL
DATA
OUTPUTS
12
D10
D11
9
10
3V
DRIVER
SUPPLY
DRVDD
DRVSS
DVDD
DATACLK
DVSS
PBLK
12
13
14
15
16
3V
ANALOG
SUPPLY
5
CLOCK
INPUTS
3
SERIAL
INTERFACE
3V
ANALOG
SUPPLY
CCDIN
PIN 1
IDENTIFIER
AD9945
(Not to Scale)
TOP VIEW
1.0␮F
0.1␮F
0.1␮F
0.1␮F
0.1␮F
D0
D1
NC = NO CONNECT
11
1.0␮F
NOTE
THE EXPOSED PAD ON THE BOTTOM OF THE AD9945 SHOULD BE
SOLDERED TO THE GND PLANE OF THE PRINTED CIRCUIT BOARD
Figure 11. Recommended Circuit Configuration for CCD Mode
REV.
C
Internal Power-On Reset Circuitr
After power-on, the AD9945 will automatically reset all internal
registers and perform internal calibration procedures. This takes
approximately 1 ms to complete. During this time, normal clock
signals and serial write operations may occur. However, serial
register writes will be ignored until the internal reset operation
is completed.
Required Start-Up Write
During power-up of the AD9945, 0x838 must be written into
Register 0xD for proper start-up operation.
Grounding and Decoupling Recommendations
As shown in Figure 11, a single ground plane is recommended for
the AD9945. This ground plane should be as continuous as
possible. This will ensure that all analog decoupling capacitors
provide the lowest possible impedance path between the power
and bypass pins and their respective ground pins. All decoupling
capacitors should be located as close as possible to the package
pins. A single clean power supply is recommended for the AD9945,
but a separate digital driver supply may be used for DRVDD
(Pin 11). DRVDD should always be decoupled to DRVSS (Pin 12),
which should be connected to the analog ground plane. If the digital
outputs (Pins 1 to 10, 31, and 32) must drive a load larger than 20 pF,
buffering is recommended to reduce digital code transition noise.
Alternatively, placing series resistors close to the digital output pins
may also help reduce noise.
AD9945
Rev. C | Page 14 of 14
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-220-WHHD.
112408-A
1
0.50
BSC
BOTTOM VIEWTOP VIEW
PIN 1
INDI
C
ATOR
32
916
17
24
25
8
EXPOSED
PAD
P
I
N
1
I
N
D
I
C
A
T
O
R
3.25
3.10 SQ
2.95
S
EATING
PLANE
0.05 MAX
0.02 NOM
0.20 REF
COPLANARITY
0.08
0.30
0.25
0.18
5.10
5.00 SQ
4.90
0.80
0.75
0.70
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0.50
0.40
0.30
0.25 MIN
Figure 12. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
5 mm × 5 mm Body, Very Very Thin Quad
(CP-32-7)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
AD9945KCPZ −20°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
AD9945KCPZRL7 −20°C to +85°C 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-32-7
1
Z = RoHS Compliant Part.
REVISION HISTORY
5/13—Rev. B to Rev. C
Updated Outline Dimensions ........................................................ 1 4
Changes to Ordering Guide ........................................................... 1 4
1/11—Rev. A to Rev. B
Changed 140 mW to 160 mW Throughout .................................. 1
Changes to Power Supply Voltage Parameter and Power
Consumption, Normal Operation (DRVDD Power not
Included) Parameter in Genera
l Specifications Table .................. 2
Changed 2.7 V to 2.85 V in Digital Specifications Table
Summary ............................................................................................ 2
Changes to System Specifications Table Summary ....................... 3
Added Low Gain Mode Parameter in System Specifications
Table .................................................................................................... 3
Added Exposed Pad Notation to Pin C
onfiguration .................... 5
Changes to TPC 1 .............................................................................. 7
Changes to Table 1 ............................................................................ 8
Changes to Figure 4 and Figure 5 ................................................... 9
Added Required Start-Up Write Section ..................................... 1 3
Changes to Grounding and Decoupling Recommendations
Section .............................................................................................. 1 3
Moved Ordering Guide .................................................................. 1
4
Changes to Ordering Guide ........................................................... 1 4
11/03—Rev. 0 to Rev. A
Changes to Timing Specifications................................................... 4
Changes to Ordering Guide ............................................................. 4
Changes to Figure 11 ...................................................................... 1 3
Updated Outline Dimensions ........................................................ 1 4
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D03636-0-5/13(C)
P1-P3P4-P6P7-P9P10-P12P13-P15

AD9945KCPZRL7

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Buy AD9945KCPZRL7
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE 12-Bit 40 MHz CCD Signal Processor
Lifecycle:
New from this manufacturer.
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