1
X9401
Low Noise/Low Power/SPI Bus
Quad, 64 Tap, Digitally Controlled
Potentiometer (XDCP™)
Description
The X9401 integrates 4 digitally controlled potentiometers
(XDCP) on a monolithic CMOS integrated microcircuit.
The digitally controlled potentiometer is implemented using
64 resistive elements in a series array. Between each
element are tap points connected to the wiper terminal
through switches. The position of the wiper on the array is
controlled by the user through the SPI bus interface. Each
potentiometer has associated with it a volatile Wiper Counter
Register (WCR) and 4 nonvolatile Data Registers
(DR0:DR3) that can be directly written to and read by the
user. The contents of the WCR controls the position of the
wiper on the resistor array through the switches. Power-up
recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments, and
signal processing.
Features
Quad - 4 Separate Pots, 64 Taps/Pot
Nonvolatile Storage of Wiper Position
Four Nonvolatile Data Registers for Each Pot
16-bytes of EEPROM Memory
SPI Serial Interface
•R
TOTAL
= 10k
Wiper Resistance = 150 Typical
Standby Current < 3µA (Total Package)
Operating Current < 700µA max.
•V
CC
= 2.7V to 5V
24 Ld SOIC and 24 Ld TSSOP Package
100 year Data Retention
Pb-Free Available (RoHS Compliant)
Block Diagram
INTERFACE
AND
CONTROL
CIRCUITRY
CS
SCK
SO
A0
A1
R0 R1
R2 R3
WIPER
COUNTER
REGISTER
(WCR)
RESISTOR
ARRAY
POT 1
V
H1
/R
H1
V
L1
/R
L1
R0 R1
R2 R3
WIPER
COUNTER
REGISTER
(WCR)
V
H0
/R
H0
V
L0
/R
L0
DATA
8
V
W0
/R
W0
V
W1
/R
W1
R0 R1
R2 R3
RESISTOR
ARRAY
V
H2
/R
H2
V
L2
/R
L2
V
W2
/R
W2
R0 R1
R2 R3
RESISTOR
ARRAY
V
H3
/R
H3
V
L3
/R
L3
V
W3
/R
W3
WIPER
COUNTER
REGISTER
(WCR)
WIPER
COUNTER
REGISTER
(WCR)
POT 3
POT 2
HOLD
POT 0
V
CC
V
SS
WP
SI
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas LLC
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas LLC 2005-2006, 2009, 2015. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
Data Sheet FN8190.5September 14, 2015
2
FN8190.5
September 14, 2015
Pin Descriptions
Host Interface Pins
SERIAL OUTPUT (SO)
SO is a push/pull serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by the
falling edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte addresses
and data to be written to the pots and pot registers are input
on this pin. Data is latched by the rising edge of the serial
clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the
X9401.
CHIP SELECT (CS
)
When CS
is HIGH, the X9401 is deselected and the SO pin
is at high impedance, and (unless an internal write cycle is
underway) the device will be in the standby state. CS
LOW
enables the X9401, placing it in the active power mode. It
should be noted that after a power-up, a HIGH to LOW
transition on CS
is required prior to the start of any
operation.
Ordering Information
PART
NUMBER
PART
MARKING
V
CC
LIMITS
(V)
POTENTIOMETER
ORGANIZATION
(k)
TEMP
RANGE
(°C) PACKAGE
PKG.
DWG. #
X9401WS24IZ* (Note 1)
(No longer available,
recommended
replacement:
X9401WS24IZ-2.7T1)
X9401WS ZI 5 ±10% 10 -40 to +85 24 Ld SOIC (300 mil) (Pb-free) M24.3
X9401WS24Z* (Note 1) (No
longer available,
recommended
replacement:
X9401WS24IZ-2.7T1)
X9401WS Z -40 to +85 24 Ld SOIC (300 mil) M24.3
X9401WV24IZ* (Note 1)
(No longer available,
recommended
replacement:
X9401WV24IZ-2.7T1)
X9401WV ZI -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9401WV24Z* (Note 1) (No
longer available,
recommended
replacement:
X9401WV24IZ-2.7T1)
X9401WV Z -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9401WS24IZ-2.7* (Note) X9401WS ZG 2.7 to 5.5 -40 to +85 24 Ld SOIC (300 mil) (Pb-free) M24.3
X9401WS24Z-2.7* (Note 1)
(No longer available,
recommended
replacement:
X9401WS24IZ-2.7T1)
X9401WS ZF -40 to +85 24 Ld SOIC (300 mil) (Pb-free) M24.3
X9401WV24IZ-2.7* (Note 1) X9401WV ZG -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
X9401WV24Z-2.7* (Note 1)
(No longer available,
recommended
replacement:
X9401WV24IZ-2.7T1)
X9401WV ZF -40 to +85 24 Ld TSSOP (4.4mm) (Pb-free) MDP0044
*Add “T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
2. Not recommended for new designs.
X9401
3
FN8190.5
September 14, 2015
HOLD (HOLD)
HOLD
is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD
may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD
must be brought LOW while
SCK is LOW. To resume communication, HOLD
is brought
HIGH, again while SCK is LOW. If the pause feature is not
used, HOLD
should be held HIGH at all times.
DEVICE ADDRESS (A
0
- A
1
)
The address inputs are used to set the least significant 2 bits of the
8-bit slave address. A match in the slave address serial data
stream must be made with the address input in order to
initiate communication with the X9401. A maximum of 4
devices may occupy the SPI serial bus.
Potentiometer Pins
V
H
(V
H0
- V
H3
)/ R
H
(R
H0
- R
H3
),
V
L
(V
L0
- V
L3
)/R
L
(R
L0
- R
L3
)
The V
H
/R
H
and V
L
/R
L
inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
VW (VW0 - VW3)/ RW (RW0 - RW3)
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT (WP
)
The WP
pin when LOW prevents nonvolatile writes to the
Wiper Counter Registers.
Pinouts
X9401
(24 LD SOIC)
TOP VIEW
X9401
(24 LD TSSOP)
TOP VIEW
Device Description
The X9401 is a highly integrated microcircuit incorporating
four resistor arrays and their associated registers and
counters and the serial interface logic providing direct
communication between the host and the XDCP
potentiometers.
Serial Interface
The X9401 supports the SPI interface hardware
conventions. The device is accessed via the SI input with
data clocked in on the rising SCK. CS
must be LOW and the
HOLD
and WP pins must be HIGH during the entire
operation.
The SO and SI pins can be connected together, since they
have three state outputs. This can help to reduce system pin
count.
1
2
3
4
5
6
7
8
9
10
11
12
V
CC
V
L0
/R
L0
V
H0
/R
H0
V
W0
/R
W0
CS
WP
SI
A
1
V
L1
/R
L1
V
H1
/R
H1
V
W1
/R
W1
V
SS
16
17
18
19
20
21
22
23
24
15
14
13
NC
V
H3
/R
H3
V
W3
/R
W3
A
0
S0
SCK
V
H2
/R
H2
V
W2
/R
W2
NC
V
L3
/R
L3
HOLD
V
L2
/R
L2
Pin Descriptions
SOIC
PIN #
TSSOP
PIN # SYMBOL DESCRIPTION
523 CS
Chip select
17 11 SCK Serial Clock
7, 19 1, 13 SI, S0 Serial Data
20, 8 14, 2 A
0
- A
1
Device Address
3, 10,
15, 22,
2, 9,
16, 23
21, 4,
9, 16,
20, 3,
10, 17
V
H0
/R
H0,
V
H1
/R
H1,
V
H2
/R
H2
, V
H3
/R
H3
,
V
L0
/R
L0,
V
L1
/R
L1
,
V
L2
/R
L2,
V
L3
/R
L3
Potentiometer end
terminals
4, 11,
14, 21
22, 5,
8, 15
V
W0
/R
W0,
V
W1
/R
W1,
V
W2
/R
W2,
V
W3
/R
W3
Wipers
624 WP
Hardware Write Protection
18 12 HOLD
Hardware Hold
119 V
CC
System Supply Voltage
12 6 V
SS
System Ground
13, 24 7, 18 NC No Connection
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
SI
A
1
V
L1
/R
L1
V
H1
/R
H1
V
W1
/R
W1
V
SS
NC
V
W2
/R
W2
V
H2
/R
H2
V
L2
/R
L2
SCK
HOLD
WP
V
W0
/R
W0
V
H0
/R
H0
V
L0
/R
L0
V
CC
V
L3
/R
L3
V
W3
/R
W3
A
0
S0
CS
NC
V
H3
/R
H3
X9401

X9401WS24IZ-2.7T1

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs X9401WS24IZ-2 7T1 QD XDCP 10KOHM 64 TAP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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