7
e. R2 = 68.1k / [(3.30V / 0.80V) – 1] 21.5k, 1%
f. Rz2 = 68.1k (1.0V / 15V) (60khz / 15khz) 15k, 1%
g. Cz2 = 1 / π (18k) (20khz) 1,000pF, X7R
h. Cp1 = 1 / 2π (15k) (3.6Mhz) 10pF => Select Cp1 = 22pF for noise filtering
i. Rz3 = 2 (68.1k) (15khz) / 300khz 7.15k, 1%
j. Cz3 = 1 / π (7.15k) (300khz) 100pF, COG
k. Cf1 = 100pF to stabilize SP7650ER internal Error Amplify
+5V INPUT WITH A TYPE III COMPENSATION APPLICATION SCHEMATIC
Figure 12 shows another example of SP7650ER configures for +5V input by simply
changing a few external resistors and capacitors components value for delivering a 0-
3A output with excellent line and load regulation.
RBST
20
CBST
6,800pF
R3
100k,1%
L1
6.8uH
C1
22uF
CVCC
2.2uF
U1
SP7650
PGND
1
PGND
2
PGND
3
GND
4
VFB
5
COMP
6
UVIN
7
GND
8
SS
9
VIN
10
VIN
11
VIN
12
VIN
13
LX
14
LX
15
LX
16
NC
17
BST
18
GND
19
GND
20
GND
21
VCC
22
LX
23
LX
24
LX
25
LX
26
DBSTCSS
47nF
CP1
22pF
3.30V
0-3A
R2
21.5k,1%
GND
C3
22uF
C3
CERAMIC
1210
X5R
5V
6.3V
VIN
SD101AWS
VOUT
GND2
RZ3
7.15k,1%
C2
0.1uF
C1
CERAMIC
0805
X5R
6.3V
CZ3
150pF
CZ2
1,000pF
R1
68.1k,1%
RZ2
15k,1%
CF1
100pF
All resistor & capacitor size
0603 unless other wise specify
fs=300Khz
Notes:
U1 Bottom-Side Layout should has
three Contacts which are
isolated from one of another, QT
& QB Drain Contact and
Controller GND Contact
Figure 12. SP7650ER Configures for Vin = 5V, Vout = 3.3V at 0-3A Output Load Current
8
PC LAYOUT DRAWINGS
Figure 13. SP7650EB Component Placement
Figure 14. SP7650EB PC Layout Top Side
Figure 15. SP7650EB PC Layout 2
nd
Layer Side
9
Figure 16. SP7650EB PC Layout 3
rd
Layer Side
Figure 17. SP7650EB PC Layout Bottom Side

SP7650EB

Mfr. #:
Manufacturer:
MaxLinear
Description:
EVAL BOARD FOR SP7650
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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