LTC4210 -1/LTC4210 -2
11
421012fa
For more information www.linear.com/LTC4210-1
APPLICATIONS INFORMATION
quency parasitic oscillations frequently associated with
the power MOSFET. In some applications, the user may
find that R
G
helps in short-circuit transient recovery as
well. However, too large of an R
G
value will slow down the
turn-off time. The recommended R
G
range is between 5Ω
and 500Ω. Usually, method 2 is preferred when the input
supply voltage is greater than 10V. R
G
limits the current
flow into the GATE pin’s internal zener clamp during tran-
sient events. The recommended R
C
and C
C
values are the
same as method 1. The parasitic compensation capacitor
C
P
is required when 0.2µF < load capacitance C
L
< 9µF,
otherwise it is optional.
Parasitic MOSFET Oscillation
There are two possible parasitic oscillations when the
MOSFET operates as a source follower when ramping at
power-up or during current limiting. The first type of oscil
-
lation occurs at high frequencies, typically above 1MHz.
This high frequency oscillation is easily damped with R
G
as mentioned in method 2.
The second type of oscillation occurs at frequencies
between 200kHz and 800kHz due to the load capacitance
being between 0.2µF and 9µF, the presence of R
G
and
R
C
resistance, the absence of a drain bypass capacitor,
a combination of bus wiring inductance and bus supply
output impedance. There are several ways to prevent this
second type of oscillation. The simplest way is to avoid
load capacitance below 10µF, the second choice is con
-
necting an external C
P
> 1.5nF.
Figure 2. Frequency Compensation
If a 7mΩ sense resistor with ±1% tolerance is used for
current limiting, the nominal current limit is 7.14A. From
Equations 2 and 3, I
LIMIT(MIN)
= 6.22A and I
LIMIT(MAX)
=
8.08A. For proper operation, the minimum current limit
must exceed the circuit maximum operating load current
with margin. The sense resistor power rating must exceed
V
CB(MAX)
2
/R
SENSE(MIN)
.
Frequency Compensation
A compensation circuit should be connected to the GATE
pin for current limit loop stability.
Method 1
The simplest frequency compensation network consists
of R
C
and C
C
(Figure 2a). The total GATE capacitance is:
C
GATE
= C
ISS
+ C
C
(4)
Generally, the compensation value in Figure 2a is sufficient
for a pair of input wires less than a foot in length. Applica
-
tions with longer input wires may require the R
C
or C
C
value
to be increased for better fault transient performance. For
a pair of three foot input wires, users can start with C
C
=
47nF and R
C
= 100Ω. Despite the wire length, the general
rule for AC stability required is C
C
≥ 8nF and R
C
≤ 1kΩ.
Method 2
The compensation network in Figure 2b is similar to the
circuitry used in method 1 but with an additional gate
resistor R
G
. The R
G
resistor helps to minimize high fre-
V
CC
SENSE
SENSE
0.007Ω
Si4410DY
Si4410DY
IN
5V
*ADDITIONAL DETAILS
OMITTED FOR CLARITY
**USE C
P
IF 0.2µF < C
L
< 9µF,
OTHERWISE NOT REQUIRED
6 5
C
L
4
R
C
100Ω
C
C
10nF
GATE
LTC4210*
(2a)
V
CC
SENSE
SENSE
0.007Ω
R
G
200Ω
C
P
**
2.2nF
V
IN
12V
V
V
OUT
6 5
4
R
C
100Ω
C
C
10nF
4210 F02
GATE
LTC4210*
(2b)
+
C
L
+
