© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 6
1 Publication Order Number:
NTD20N03L27/D
NTD20N03L27, NVD20N03L27
Power MOSFET
20 A, 30 V, N−Channel DPAK
This logic level vertical power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
Features
• Ultra−Low R
DS(on)
, Single Base, Advanced Technology
• SPICE Parameters Available
• Diode is Characterized for use in Bridge Circuits
• I
DSS
and V
DS(on)
Specified at Elevated Temperatures
• High Avalanche Energy Specified
• ESD JEDAC rated HBM Class 1, MM Class A, CDM Class 0
• NVD Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Power Supplies
• Inductive Loads
• PWM Motor Controls
• Replaces MTD20N03L in many Applications
MAXIMUM RATINGS (T
C
= 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage V
DSS
30 Vdc
Drain−to−Gate Voltage (R
GS
= 1.0 MW)
V
DGR
30 Vdc
Gate−to−Source Voltage
− Continuous
− Non−Repetitive (t
p
v10 ms)
V
GS
V
GS
±20
±24
Vdc
Drain Current
− Continuous @ T
A
= 25_C
− Continuous @ T
A
= 100_C
− Single Pulse (t
p
v10 ms)
I
D
I
D
I
DM
20
16
60
Adc
Apk
Total Power Dissipation @ T
A
= 25_C
Derate above 25°C
Total Power Dissipation @ T
C
= 25°C (Note 1)
P
D
74
0.6
1.75
W
W/°CW
Operating and Storage Temperature Range T
J
, T
stg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting T
J
= 25°C
(V
DD
= 30 Vdc, V
GS
= 5 Vdc, L = 1.0 mH,
I
L(pk)
= 24 A, V
DS
= 34 Vdc)
E
AS
288 mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
R
q
JC
R
q
JA
R
q
JA
1.67
100
71.4
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
T
L
260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended
pad size and repetitive rating; pulse width limited by maximum junction
temperature.
20 A, 30 V, R
DS(on)
= 27 mW
N−Channel
D
S
G
1
Gate
3
Source
2
Drain
4
Drain
DPAK
CASE 369C
STYLE 2
A = Assembly Location*
20N3L = Device Code
Y = Year
WW = Work Week
G = Pb−Free Package
1
2
3
4
MARKING DIAGRAM
& PIN ASSIGNMENTS
AYWW
20
N3LG
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.