22
3053C–MICRO–6/08
AT89LS51
Notes: 1. Under steady state (non-transient) conditions, I
OL
must be externally limited as follows:
Maximum I
OL
per port pin: 10 mA
Maximum I
OL
per 8-bit port:
Port 0: 26 mA Ports 1, 2, 3: 15 mA
Maximum total I
OL
for all output pins: 71 mA
If I
OL
exceeds the test condition, V
OL
may exceed the related specification. Pins are not guaranteed to sink current greater
than the listed test conditions.
2. Minimum V
CC
for Power-down is 2V.
22. DC Characteristics
The values shown in this table are valid for T
A
= -40°C to 85°C and V
CC
= 2.7V to 4.0V, unless otherwise noted.
Symbol Parameter Condition Min Max Units
V
IL
Input Low Voltage (Except EA)-0.50.7V
V
IL1
Input Low Voltage (EA) -0.5 0.2 V
CC
-0.3 V
V
IH
Input High Voltage (Except XTAL1, RST) 0.2 V
CC
+0.9 V
CC
+0.5 V
V
IH1
Input High Voltage (XTAL1, RST) 0.7 V
CC
V
CC
+0.5 V
V
OL
Output Low Voltage
(1)
(Ports
1,2,3)
I
OL
= 0.8 mA 0.45 V
V
OL1
Output Low Voltage
(1)
(Port 0, ALE, PSEN)
I
OL
= 1.6 mA 0.45 V
V
OH
Output High Voltage
(Ports 1,2,3, ALE, PSEN
)
I
OH
= -60 µA 2.4 V
I
OH
= -25 µA 0.65 V
CC
V
I
OH
= -10 µA 0.80 V
CC
V
V
OH1
Output High Voltage
(Port 0 in External Bus Mode)
I
OH
= -800 µA 2.4 V
I
OH
= -300 µA 0.75 V
CC
V
I
OH
= -80 µA 0.9 V
CC
V
I
IL
Logical 0 Input Current (Ports
1,2,3)
V
IN
= 0.45V -50 µA
I
TL
Logical 1 to 0 Transition Current
(Ports 1,2,3)
V
IN
= 2V -150 µA
I
LI
Input Leakage Current (Port 0,
EA)
0.45 < V
IN
< V
CC
±10 µA
RRST Reset Pulldown Resistor 50 300 KΩ
C
IO
Pin Capacitance Test Freq. = 1 MHz, T
A
= 25°C 10 pF
I
CC
Power Supply Current
Active Mode, 12 MHz 25 mA
Idle Mode, 12 MHz 6.5 mA
Power-down Mode
(2)
V
CC
= 4.0V 30 µA
23
3053C–MICRO–6/08
AT89LS51
23. AC Characteristics
Under operating conditions, load capacitance for Port 0, ALE/PROG, and PSEN = 100 pF; load capacitance for all other
outputs = 80 pF.
23.1 External Program and Data Memory Characteristics
Symbol Parameter
16 MHz Oscillator Variable Oscillator
UnitsMin Max Min Max
1/t
CLCL
Oscillator Frequency 0 16 MHz
t
LHLL
ALE Pulse Width 85 2t
CLCL
-40 ns
t
AVLL
Address Valid to ALE Low 22 t
CLCL
-40 ns
t
LLAX
Address Hold After ALE Low 32 t
CLCL
-30 ns
t
LLIV
ALE Low to Valid Instruction In 150 4t
CLCL
-100 ns
t
LLPL
ALE Low to PSEN Low 32 t
CLCL
-30 ns
t
PLPH
PSEN Pulse Width 142 3t
CLCL
-45 ns
t
PLIV
PSEN Low to Valid Instruction In 82 3t
CLCL
-105 ns
t
PXIX
Input Instruction Hold After PSEN 00ns
t
PXIZ
Input Instruction Float After PSEN 37 t
CLCL
-25 ns
t
PXAV
PSEN to Address Valid 75 t
CLCL
-8 ns
t
AVIV
Address to Valid Instruction In 207 5t
CLCL
-105 ns
t
PLAZ
PSEN Low to Address Float 10 10 ns
t
RLRH
RD Pulse Width 275 6t
CLCL
-100 ns
t
WLWH
WR Pulse Width 275 6t
CLCL
-100 ns
t
RLDV
RD Low to Valid Data In 147 5t
CLCL
-165 ns
t
RHDX
Data Hold After RD 00ns
t
RHDZ
Data Float After RD 65 2t
CLCL
-60 ns
t
LLDV
ALE Low to Valid Data In 350 8t
CLCL
-150 ns
t
AVDV
Address to Valid Data In 397 9t
CLCL
-165 ns
t
LLWL
ALE Low to RD or WR Low 137 239 3t
CLCL
-50 3t
CLCL
+50 ns
t
AVWL
Address to RD or WR Low 122 4t
CLCL
-130 ns
t
QVWX
Data Valid to WR Transition 13 t
CLCL
-50 ns
t
QVWH
Data Valid to WR High 287 7t
CLCL
-150 ns
t
WHQX
Data Hold After WR 13 t
CLCL
-50 ns
t
RLAZ
RD Low to Address Float 0 0 ns
t
WHLH
RD or WR High to ALE High 23 103 t
CLCL
-40 t
CLCL
+40 ns
24
3053C–MICRO–6/08
AT89LS51
24. External Program Memory Read Cycle
25. External Data Memory Read Cycle
t
LHLL
t
LLIV
t
PLIV
t
LLAX
t
PXIZ
t
PLPH
t
PLAZ
t
PXAV
t
AVLL
t
LLPL
t
AVIV
t
PXIX
ALE
PSEN
PORT 0
PORT 2
A8 - A15
A0 - A7 A0 - A7
A8 - A15
INSTR IN
t
LHLL
t
LLDV
t
LLWL
t
LLAX
t
WHLH
t
AVLL
t
RLRH
t
AVDV
t
AVWL
t
RLAZ
t
RHDX
t
RLDV
t
RHDZ
A0 - A7 FROM RI OR DPL
ALE
PSEN
RD
PORT 0
PORT 2
P2.0 - P2.7 OR A8 - A15 FROM DPH
A0 - A7 FROM PCL
A8 - A15 FROM PCH
DATA IN INSTR IN

AT89LS51-16PI

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU LOW VOLTAGE 4K ISP FLASH - 16MHz
Lifecycle:
New from this manufacturer.
Delivery:
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