PESDXL5UF_V_Y_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 8 January 2008 9 of 17
NXP Semiconductors
PESDxL5UF/V/Y
Low capacitance unidirectional fivefold ESD protection diode arrays
Fig 8. ESD clamping test setup and waveforms
006aab143
50
R
Z
C
Z
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC 61000-4-2 network)
unclamped 1 kV ESD voltage waveform
(IEC 61000-4-2 network)
clamped 1 kV ESD voltage waveform
(IEC 61000-4-2 network)
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 5 V/div
horizontal scale = 50 ns/div
GND
GND
GND1
GND2
GND
450
RG 223/U
50 coax
ESD TESTER
IEC 61000-4-2 network
C
Z
= 150 pF; R
Z
= 330
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
(1)
vertical scale = 5 V/div
horizontal scale = 50 ns/div
(1): attenuator is only used for open
socket high voltage measurements
PESD5V0L5UF/V/Y
PESD3V3L5UF/V/Y
DUT
Device
Under
Test
PESDXL5UF_V_Y_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 8 January 2008 10 of 17
NXP Semiconductors
PESDxL5UF/V/Y
Low capacitance unidirectional fivefold ESD protection diode arrays
7. Application information
The devices are designed for the protection of up to five unidirectional data or signal lines
from the damage caused by ESD and surge pulses. The devices may be used on lines
where the signal polarities are both, positive and negative with respect to ground. The
devices provide a surge capability of 25 W per line for an 8/20 µs waveform each.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
Fig 9. Typical application for unidirectional
application of five lines
Fig 10. Typical application for bidirectional application
of four lines
006aab144
DUT
GND
high-speed data lines
006aab145
DUT
GND
high-speed data lines
PESDXL5UF_V_Y_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 8 January 2008 11 of 17
NXP Semiconductors
PESDxL5UF/V/Y
Low capacitance unidirectional fivefold ESD protection diode arrays
8. Package outline
Fig 11. Package outline PESDxL5UF (SOT886) Fig 12. Package outline PESDxL5UV (SOT666)
Fig 13. Package outline PESDxL5UY (SOT363/SC-88)
04-07-22Dimensions in mm
0.25
0.17
0.40
0.32
0.35
0.27
0.5
0.6
1.05
0.95
1.5
1.4
0.5
0.50
max
0.04
max
3
2
1
4
5
6
Dimensions in mm
04-11-08
1.7
1.5
1.7
1.5
1.3
1.1
1
0.18
0.08
0.27
0.17
0.5
pin 1 index
123
456
0.6
0.5
0.3
0.1
06-03-16Dimensions in mm
0.25
0.10
0.3
0.2
pin 1
index
1.3
0.65
2.2
2.0
1.35
1.15
2.2
1.8
1.1
0.8
0.45
0.15
132
465

PESD5V0L5UV,115

Mfr. #:
Manufacturer:
Nexperia
Description:
TVS Diodes / ESD Suppressors DIODE ARRAY ESD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union