LTC3374
13
3374fc
For more information www.linear.com/LTC3374
BLOCK DIAGRAM
(Pin numbers reflect QFN package)
13
39
EN4
12
FB4
10
SW4
11
V
IN4
14
EN3
7
FB3
9
SW3
8
V
IN3
37
EN2
6
FB2
4
SW2
MASTER/SLAVE LINES
MASTER/SLAVE LINES
MASTER/SLAVE LINES
MASTER/SLAVE LINES
GND (EXPOSED PAD)
MASTER/SLAVE LINES
MASTER/SLAVE LINES
MASTER/SLAVE LINES
5
V
IN2
38
EN1
1
FB1
3
SW1
REF, CLK
8 PGOOD
2
19
20
22
21
18
25
23
24
33
26
28
27
32
31
29
30
V
IN1
EN5
3374 BD
FB5
SW5
V
IN5
EN6
FB6
SW6
V
IN6
EN7
FB7
SW7
V
IN7
EN8
FB8
SW8
V
IN8
34
MODE
PGOOD_ALL
BUCK REGULATOR 4
1A
BUCK REGULATOR 3
1A
BUCK REGULATOR 2
1A
BUCK REGULATOR 1
1A
BUCK REGULATOR 5
1A
BUCK REGULATOR 6
1A
BUCK REGULATOR 7
1A
BUCK REGULATOR 8
1A
BANDGAP,
OSCILLATOR,
UV, OT
TEMP MONITOR
TOP LOGIC
17
RT
16
SYNC
36
TEMP
35
V
CC
15
LTC3374
14
3374fc
For more information www.linear.com/LTC3374
OPERATION
Buck Switching Regulators
The LTC3374 contains eight monolithic 1A synchronous
buck switching regulators. All of the switching regula-
tors are internally compensated and need only external
feedback resistors to set the output voltage. The switch-
ing regulators offer two operating modes: Burst Mode
operation (when the MODE pin is set low) for higher
efficiency at light loads and forced continuous PWM mode
(when the MODE pin
is set high) for lower noise at light
loads. The MODE pin collectively sets the operating mode
for all enabled buck switching regulators. In Burst Mode
operation at light loads, the output capacitor is charged
to a voltage slightly higher than its regulation point. The
regulator then goes into sleep mode, during which time
the output capacitor provides the load current. In sleep
most of the regulator
’s circuitry is powered down, helping
conserve input power. When the output capacitor droops
below its programmed value, the circuitry is powered on
and another burst cycle begins. The sleep time decreases
as load current increases. In Burst Mode operation, the
regulator will burst at light loads whereas at higher loads
it will operate at constant frequency PWM mode operation.
In forced continuous mode, the oscillator runs
continu-
ously and the buck switch currents are allowed to reverse
under very light load conditions to maintain regulation.
This mode allows the buck to run at a fixed frequency with
minimal output ripple.
Each buck switching regulator has its own V
IN
, SW, FB
and EN pins to maximize flexibility. The enable pins have
two different enable threshold voltages that depend on
the operating state of
the LTC3374. With all regulators
disabled, the enable pin threshold is set to 730mV (typical).
Once any regulator is enabled, the enable pin thresholds
of the remaining regulators are set to a bandgap-based
400mV and the EN pins are each monitored by a precision
comparator. This precision EN threshold may be used to
provide event-based sequencing via feedback from other
previously enabled regulators. All
buck regulators have
forward and reverse-current limiting, soft-start to limit
inrush current during start-up, and short-circuit protection.
Figure 1. Buck Regulators Configured as Master-Slave
BUCK REGULATOR 1
(MASTER)
V
IN
V
IN
V
IN
SW1
C
OUT
V
OUT
1.2V
2A
400k
L1
800k
FB1EN1
BUCK REGULATOR 2
(SLAVE)
SW2
EN2
V
IN1
V
IN2
FB2
3374 F01
The buck switching regulators are phased in 90° steps to
reduce noise and input ripple. The phase step determines
the fixed edge of the switching sequence, which is when
the PMOS turns on. The PMOS off (NMOS on) phase
is subject to the duty cycle demanded by the regulator.
Bucks 1 and 2 are set to 0°, bucks 3 and 4 are set to 90°,
bucks 5 and 6 are set to 180°, and bucks 7 and 8 are set
to 270°. In shutdown all SW nodes are high impedance.
The buck regulator enable pins may be tied to V
OUT
volt-
ages, through a resistor divider, to program power-up
sequencing.
Buck Regulators with Combined Power Stages
Up to four adjacent buck regulators may be combined
in a master-slave configuration by connecting their SW
pins together, connecting their V
IN
pins together, and
connecting the higher numbered
bucks’ FB pin(s) to the
input supply. The lowest numbered buck is always the
master. In Figure1, buck regulator 1 is the master. The
feedback network connected to the FB1 pin programs
the output voltage to 1.2V. The FB2 pin is tied to V
IN1-2
,
which configures buck regulator 2 as the slave. The SW1
and SW2 pins must be tied together, as must the V
IN1
and
V
IN2
pins. The slave buck control circuitry draws no
current. The enable of the master buck (EN1) controls the
LTC3374
15
3374fc
For more information www.linear.com/LTC3374
operation of the combined bucks; the enable of the slave
regulator (EN2) must be tied to ground.
Any combination of 2, 3, or 4 adjacent buck regulators
may be combined to provide either 2A, 3A, or 4A of aver-
age output load current. For example, buck regulator 1
and buck regulator 2 may run independently, while buck
regulators 3 and 4 may be combined to provide 2A, while
buck regulators 5 through 8 may be combined
to provide
4A. Buck regulator 1 is never a slave, and buck regulator
8 is never a master. 15 unique output power stage con-
figurations are possible to maximize application flexibility.
Power Failure Reporting Via PGOOD_ALL Pin
Power failure conditions are reported back via the
PGOOD_ALL pin. All buck switching regulators have an
internal power good (PGOOD) signal. When the regulated
output voltage of an enabled switcher rises
above 93.5%
of its programmed value, the PGOOD signal will transition
high. When the regulated output voltage falls below
92.5% of its programmed value, the PGOOD signal is
pulled low. If any internal PGOOD signal stays low for
greater than 100µs, then the PGOOD_ALL pin is pulled
low, indicating to a microprocessor that a power failure
fault has occurred. The 100µs filter time prevents the pin
from
being pulled low due to a transient.
An error condition that pulls the PGOOD_ALL pin low
is not latched. When the error condition goes away, the
PGOOD_ALL pin is released and is pulled high if no other
error condition exists. If no buck switching regulators are
enabled, then PGOOD_ALL will be pulled low.
Temperature Monitoring and Overtemperature
Protection
To prevent thermal damage to the LTC
3374 and its sur-
rounding components, the LTC3374 incorporates an
overtemperature (OT) function. When the LTC3374 die
temperature reaches 165°C (typical) all enabled buck
switching regulators are shut down and remain in shutdown
until the die temperature falls to 155°C (typical).
OPERATION
The temperature may be read back by the user by sampling
the TEMP pin analog voltage. The temperature, T, indicated
by the TEMP pin voltage
is given by:
T =
V
TEMP
+19mV
6.75mV
1°C
(1)
If none of the buck switching regulators are enabled, then
the temperature monitor is shut down to further reduce
quiescent current.
Programming the Operating Frequency
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge losses but requires larger
inductance
values and/or capacitance to maintain low
output voltage ripple.
The operating frequency for all of the LTC3374 regulators
is determined by an external resistor that is connected
between the RT pin and ground. The operating frequency
can be calculated by using the following equation:
f
OSC
=
8 10
11
ΩHz
R
T
(2)
While the LTC3374 is designed to function with operat-
ing frequencies between 1MHz and 3MHz, it has safety
clamps that will prevent the oscillator from running faster
than 4MHz (typical) or slower than 250kHz (typical). Tying
the RT pin to V
CC
sets the oscillator to the default internal
operating frequency of 2MHz (typical).
The LTC3374’s internal oscillator can be synchronized
through an internal PLL
circuit, to an external frequency
by applying a square wave clock signal to the SYNC pin.
During synchronization, the top MOSFET turn-on of buck
switching regulators 1 and 2 are locked to the rising edge
of the external frequency source. All other buck switching

LTC3374EUHF#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 8-Channel Programmable, Parallelable 1A Buck DC-DCs
Lifecycle:
New from this manufacturer.
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