74LVT_LVTH244B_3 © Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Product data sheet Rev. 03 — 3 March 2006 7 of 15
Philips Semiconductors
74LVT244B; 74LVTH244B
3.3 V octal buffer/line driver; 3-state
[1] Typical values are measured at T
amb
= 25 °C.
[2] Unused pins at V
CC
or GND.
[3] This is the bus hold overdrive current required to force the input to the opposite logic state.
[4] This parameter is valid for any V
CC
between 0 V and 1.2 V with a transition time of up to 10 ms. From V
CC
= 1.2 V to V
CC
= 3.3 V ± 0.3 V
a transition time of 100 µs is permitted. This parameter is valid for T
amb
= 25 °C only.
[5] I
CC
is measured with outputs pulled to V
CC
or GND.
[6] This is the increase in supply current for each input at V
CC
− 0.6 V.
11. Dynamic characteristics
[1] Typical values are measured at V
CC
= 3.3 V and T
amb
= 25 °C.
∆I
CC
additional quiescent supply
current
per input pin; V
CC
= 3.0 V to 3.6 V;
one input at V
CC
− 0.6 V and other
inputs at V
CC
or GND
[6]
- 0.1 0.2 mA
C
i
input capacitance V
I
= 0 V or 3.0 V - 4 - pF
C
o
output capacitance outputs disabled; V
O
= 0 V or 3.0 V - 8 - pF
Table 7. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter Conditions Min Typ Max Unit
T
amb
= −40 °C to +85 °C
[1]
t
PLH
LOW-to-HIGH propagation delay
nAn to nYn
see Figure 4
V
CC
= 2.7 V - - 3.8 ns
V
CC
= 3.0 V to 3.6 V 1.1 1.9 3.5 ns
t
PHL
HIGH-to-LOW propagation delay
nAn to nYn
see Figure 4
V
CC
= 2.7 V - - 3.6 ns
V
CC
= 3.0 V to 3.6 V 1.3 2.0 3.3 ns
t
PZH
output enable time to HIGH-level
n
OE to nYn
see
Figure 5
V
CC
= 2.7 V - - 5.3 ns
V
CC
= 3.0 V to 3.6 V 1.1 2.8 4.5 ns
t
PZL
output enable time to LOW-level
n
OE to nYn
see
Figure 5
V
CC
= 2.7 V - - 4.9 ns
V
CC
= 3.0 V to 3.6 V 1.4 2.3 4.4 ns
t
PHZ
output disable time from HIGH-level
n
OE to nYn
see
Figure 5
V
CC
= 2.7 V - - 4.5 ns
V
CC
= 3.0 V to 3.6 V 1.9 2.9 4.4 ns
t
PLZ
output disable time from LOW-level
n
OE to nYn
see
Figure 5
V
CC
= 2.7 V - - 4.4 ns
V
CC
= 3.0 V to 3.6 V 1.8 2.5 4.4 ns
