AD53508JP

AD53508
–6–
REV. A
PPMU APPLICATION NOTES
The PPMU can be used in two modes: 1. VOLTAGE FORCE
with CURRENT MEASURE or VERIFY CURRENT FORCE;
2. CURRENT FORCE with VOLTAGE MEASURE or
VERIFY VOLTAGE FORCE. In both modes the following
setup is recommended:
1. The value of the external integrate capacitor (EXT_RC to
C1) is 10 nF.
2. MEAS_OUT pin is loaded with 1 M to ground.
3. V
CC
= 15.0 V, V
DD
= 4.5 V, DIGGND = 0.0 V,
V
EE
= 10 V, DSR = 2.5 V unless otherwise stated.
4. A 10 resistor in series with the FORCE pin.
5. A 1 k resistor in series with the SENSE pin.
IN VOLTAGE FORCE WITH CURRENT MEASURE OR
VERIFY CURRENT FORCE
To measure the leakage in the current measure and hold mode,
the PPMU has to be into the Force Voltage/Measure Current
Integrate mode.
1. The FORCE_A (Force Output) pin has to be programmed
to 9 V.
2. The PPMU has to be programmed to INTEGRATE mode.
3. The PPMU has to be programmed to HOLD mode.
4. Sample MEAS_OUT.
5. Wait 100 ms.
6. Sample MEAS_OUT again.
7. The difference between 2 and 4 must be less than 15 mV.
The linearity tests for forcing voltage are as follows (at the
FORCE pin):
1. The four ranges of CURRENT MEASURE ranges (200 nA,
20 µA, 200 µA, and 2 mA) correspond to F1, F2, F3, and F4.
2. The endpoints of the linearity curve are determined by full
scale (or LOW), and the +full scale (or HIGH) readings at
the same FORCE pin current.
3. Using these endpoints, gain nonlinearity is computed and
tested at the 1/4 scale, 1/2 scale, and 3/4 scale points.
S11
S12
S13
S14
S15
S16
INT/IM
R1
R2
INTEGRATE
S10
UNITY
DIFF
VF
S4
IF
S5
C1
1k
2mA
10k
200A
EXT RC
SENSE
S8
S9
S2
S3
VM
IM
ENABLE
S1
CON
2.5V
S6
S7
FORCING
VOLTAGE
DAC1
DAC2
DSR
MEAS
OUT
40pF
S17
GUARD
FORCE
SENSE
R
R
1.25R
1.25R
MAIN
GUARD
S18
AD53508
OUTPUT
1k
10
TO DUT
Figure 2. Guarded Voltage Force/Current Measure, I
RANGE 1
: I
2 mA
4. Computations for F1 are:
F1 × 0.25 = LOW + 1 × (HIGH LOW)/4
F1 × 0.50 = LOW + 2 × (HIGH LOW)/4
F1 × 0.75 = LOW + 3 × (HIGH LOW)/4
Where LOW = Full Scale and HIGH = +Full Scale.
The linearity tests for measuring current are as follows (at the
MEAS_OUT pin):
1. The voltage is constant for these measurements.
2. The four ranges (M1, M2, M3, M4) correspond to
CURRENT MEASURE ranges (200 nA, 20 µA, 200 µA,
and 2 mA respectively).
3. The endpoints of the linearity curve are determined by the
full scale (or LOW), and the +full scale (or HIGH) read-
ings at the same FORCE pin voltage.
4. Using these endpoints, gain nonlinearity is computed and
tested at the 1/4 scale, 1/2 scale, and 3/4 scale points.
5. Computations for M1 are:
M1 × 0.25 = LOW + 1 × (HIGH LOW)/4
M1 × 0.50 = LOW + 2 × (HIGH LOW)/4
M1 × 0.75 = LOW + 3 × (HIGH LOW)/4
Where LOW = Full Scale, and HIGH = +Full Scale.
The M_CON pin can be used for disconnecting the MEAS_OUT
pin by:
1. Raising M_CON to 2.4 V.
2. Measuring MEAS_OUT (which is loaded with 100 k).
3. MEAS_OUT should ideally be 0 V.
The OUTPUT_CON pin can be used for disconnecting the
DUT by:
1. Disabling the SENSE pin (OUTPUT_CON = 2.4 V).
2. Loading FORCE_OUT with 2 k to ground.
3. Programming the DAC1 input to +FS (+9 V) and measuring
the FORCE_OUT voltage (FV1).
4. Programming the DAC1 input to FS (4 V) and measur-
ing the FORCE_OUT voltage (FV2).
5. FV1FV2 < 1.3 mV.
6. A change of 1.3 mV implies a switch off-resistance of 20 M.
AD53508
–7–REV. A
IN CURRENT FORCE WITH VOLTAGE MEASURE OR
VERIFY CURRENT FORCE
The linearity tests for forcing current at the FORCE pin:
1. The FORCE pin is loaded with a voltage source.
2. The two ranges of CURRENT FORCE ranges (2 mA and
200 µA) correspond to F1 and F2. The endpoints of the
linearity curve are determined by full scale (or LOW), and
the full scale (or HIGH) readings at the same FORCE pin
voltage.
3. Using these endpoints, gain nonlinearity is computed and
tested at the 1/4 scale, 1/2 scale, and 3/4 scale points.
4. Computations for F1 are:
F1 × 0.25 = LOW + 1 × (HIGH LOW)/4
F1 × 0.50 = LOW + 2 × (HIGH LOW)/4
F1 × 0.75 = LOW + 3 × (HIGH LOW)/4
Where LOW = Full Scale and HIGH = +Full Scale.
The linearity test for measuring voltage is as follows (at the
MEAS_OUT pin):
1. The endpoints of the linearity curve are determined by the
full scale (or LOW), and the +full scale (or HIGH) readings.
2. Using these endpoints, gain nonlinearity is computed and
tested at the 1/4 scale, 1/2 scale, and 3/4 scale points.
3. Computations for M1 are:
M1 × 0.25 = LOW + 1 × (HIGH LOW)/4
M1 × 0.50 = LOW + 2 × (HIGH LOW)/4
M1 × 0.75 = LOW + 3 × (HIGH LOW)/4
Where LOW = Full Scale, and HIGH = +Full Scale.
CURRENT FORCE WITH VOLTAGE MEASURE
(2 mA RANGE)
1. DAC1 = 5 V.
2. FORCE pin loaded with 9 V source.
3. Measure current at FORCE.
4. Measure voltage at MEAS_OUT.
5. V
CC
= 15 V.
6. Measure current at FORCE and compare to 3.
7. Measure voltage at MEAS_OUT and compare to 4.
8. V
CC
= 15 V.
9. DAC1 = 0 V.
10. FORCE pin loaded with 4 V source.
11. Measure current at FORCE.
12. Measure voltage at MEAS_OUT.
13. V
EE
= 9.5 V.
14. Measure current at FORCE and compare to 11.
15. Measure voltage at MEAS_OUT and compare to 12.
16. V
EE
= 10 V.
VOLTAGE FORCE WITH CURRENT MEASURE
(2 mA RANGE)
1. DAC1 = 9 V.
2. FORCE pin loaded with 2 mA current source.
3. Measure voltage at FORCE.
4. Measure current at MEAS_OUT.
5. V
CC
= 14.25 V.
6. Measure voltage at FORCE and compare to 3:
Limit = ±237 µV.
7. Measure current at MEAS_OUT and compare to 4:
Limit = ±237 µV.
8. V
CC
= 15 V.
9. DAC1 = 4 V.
10. FORCE pin loaded with 2 mA current sink.
11. Measure voltage at FORCE.
12. Measure current at MEAS_OUT.
13. V
EE
= 9.5 V.
14. Measure voltage at FORCE and compare to 11:
Limit = ±474 µV.
15. Measure current at MEAS_OUT and compare to 12.
16. V
EE
= 10 V.
S11
S12
S13
S14
S15
S16
INT/IM
R1
R2
INTEGRATE
S10
UNITY
DIFF
VF S4
IF
S5
C1
1k
2mA
10k
200A
EXT RC
SENSE
S8
S9
S2
S3
VM
IM
ENABLE
S1
CON
2.5V
S6
S7
FORCING
VOLTAGE
DAC1
DAC2
DSR
MEAS
OUT
40pF
S17
GUARD
FORCE
SENSE
R
R
1.25R
1.25R
MAIN
GUARD
S18
AD53508
OUTPUT
Figure 3. Guarded Current Force/Voltage Measure, I
RANGE 1
: I
2 mA
AD53508
REV. A
C00684–0–6/01(A)
PRINTED IN U.S.A.
–8–
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
44-Lead Plastic Leaded Chip Carrier (PLCC)
(P-44A)
6
PIN 1
IDENTIFIER
7
40
39
17
18
29
28
TOP VIEW
(PINS DOWN)
0.695 (17.65)
0.685 (17.40)
SQ
0.656 (16.66)
0.650 (16.51)
SQ
0.048 (1.21)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
0.020
(0.50)
R
0.021 (0.53)
0.013 (0.33)
0.050
(1.27)
BSC
0.63 (16.00)
0.59 (14.99)
0.032 (0.81)
0.026 (0.66)
0.180 (4.57)
0.165 (4.19)
0.040 (1.01)
0.025 (0.64)
0.025 (0.63)
0.015 (0.38)
0.110 (2.79)
0.085 (2.16)
0.056 (1.42)
0.042 (1.07)
V/I
V/I
24
23
47
45
37
38
43
42
49
50
31
16
13
12
7
6
4
3
11
10
17
25
30
22
27
36
35
29
30
22
26
15
14
GUARD*
SENSE
*
FORCE
FROM OTHER PMUs
TO DUT
TO DUT (SENSE)
"CONNECT TO HIGH QUALITY,
LOW NOISE SIGNAL (GND)"
DSR
PPMU
DAC1
DAC2
TO SYSTEM
VOLTMETER
TO V/I DAC
(PER CHANNEL)
MEAS_OUT
1 51 52 39 40 41 32
AD53508
25
VHDCPL
39nF
CHDCPL
39nF
CLDCPL
VOUT
VLDCPL
50
DRIVER
COMPARATOR
ACTIVE LOAD
+1
1.0A/K
VH
VTERM
DATA
DATA
IOD
IOD
RLD
RLD
VL
HCOMP
LEH
LEH
QH
QHB
QL
QL
LEL
LEL
LCOMP
VCOMI
IOLC
IOLRTN
IOHRTN
INHL
INHL
IOHC
VCOMS
IOL
IOH
THERM
NC
2819
PWRGND ECLGND HQGND2 HQGND
GUARD
V
CC
34
V
EE
9, 33, 44, 46, 48
2, 5, 8
Figure 4. Recommended Use of the PPMU with a DCL

AD53508JP

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Management Specialized - PMIC Dual PMU
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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