Summary of Intel MAX 10 Device Features
Table 2. Summary of Features for Intel MAX 10 Devices
Feature Description
Technology 55 nm TSMC Embedded Flash (Flash + SRAM) process technology
Packaging Low cost, small form factor packages—support multiple packaging
technologies and pin pitches
Multiple device densities with compatible package footprints for seamless
migration between different device densities
RoHS6-compliant
Core architecture 4-input look-up table (LUT) and single register logic element (LE)
LEs arranged in logic array block (LAB)
Embedded RAM and user flash memory
Clocks and PLLs
Embedded multiplier blocks
General purpose I/Os
Internal memory blocks M9K—9 kilobits (Kb) memory blocks
Cascadable blocks to create RAM, dual port, and FIFO functions
User flash memory (UFM) User accessible non-volatile storage
High speed operating frequency
Large memory size
High data retention
Multiple interface option
Embedded multiplier blocks One 18 × 18 or two 9 × 9 multiplier modes
Cascadable blocks enabling creation of filters, arithmetic functions, and image
processing pipelines
ADC 12-bit successive approximation register (SAR) type
Up to 17 analog inputs
Cumulative speed up to 1 million samples per second ( MSPS)
Integrated temperature sensing capability
Clock networks Global clocks support
High speed frequency in clock network
Internal oscillator Built-in internal ring oscillator
PLLs Analog-based
Low jitter
High precision clock synthesis
Clock delay compensation
Zero delay buffering
Multiple output taps
General-purpose I/Os (GPIOs) Multiple I/O standards support
On-chip termination (OCT)
Up to 830 megabits per second (Mbps) LVDS receiver, 800 Mbps LVDS
transmitter
External memory interface (EMIF)
(1)
Supports up to 600 Mbps external memory interfaces:
continued...
(1)
EMIF is only supported in selected Intel MAX 10 device density and package combinations.
Refer to the External Memory Interface User Guide for more information.
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Feature Description
DDR3, DDR3L, DDR2, LPDDR2 (on 10M16, 10M25, 10M40, and 10M50.)
SRAM (Hardware support only)
Note: For 600 Mbps performance, –6 device speed grade is required.
Performance varies according to device grade (commercial, industrial, or
automotive) and device speed grade (–6 or –7). Refer to the Intel MAX
10 FPGA Device Datasheet or External Memory Interface Spec Estimator
for more details.
Configuration Internal configuration
JTAG
Advanced Encryption Standard (AES) 128-bit encryption and compression
options
Flash memory data retention of 20 years at 85 °C
Flexible power supply schemes Single- and dual-supply device options
Dynamically controlled input buffer power down
Sleep mode for dynamic power reduction
Intel MAX 10 Device Ordering Information
Figure 1. Sample Ordering Code and Available Options for Intel MAX 10 Devices
V : Wafer-Level Chip Scale (WLCSP)
E : Plastic Enhanced Quad Flat Pack (EQFP)
M : Micro FineLine BGA (MBGA)
U : Ultra FineLine BGA (UBGA)
F : FineLine BGA (FBGA)
Family Signature
Package Type
WLCSP Package Type
36 : 36 pins, 3 mm x 3 mm
81 : 81 pins, 4 mm x 4 mm
EQFP Package Type
144 : 144 pins, 22 mm x 22 mm
UBGA Package Type
169 : 169 pins, 11 mm x 11 mm
324 : 324 pins, 15 mm x 15 mm
FBGA Package Type
256 : 256 pins, 17 mm x 17 mm
484 : 484 pins, 23 mm x 23 mm
672 : 672 pins, 27 mm x 27 mm
MBGA Package Type
153 : 153 pins, 8 mm x 8 mm
Package Code
Operating Temperature
FPGA Fabric
Speed Grade
Optional Suffix
Indicates specific device
options or shipment method
6 (fastest)
7
8
10M 16 DA U 484 I 7 G
SC : Single supply - compact features
:
:
:
:
SA : Single supply - analog and flash features
with RSU option
DC
Dual supply - compact features
DF
Dual supply - flash features with RSU option
DA
Dual supply - analog and flash features
with RSU option
Feature Options
02 : 2K logic elements
04 : 4K logic elements
08 : 8K logic elements
16 : 16K logic elements
25 : 25K logic elements
40 : 40K logic elements
50 : 50K logic elements
Member Code
10M : Intel® MAX® 10
G : RoHS6
ES : Engineering sample
P : Leaded package
C : Commercial (T = 0° C to 85° C)
I : Industrial (T = - 40° C to 100° C)
A : Automotive (T = - 40° C to 125° C)
J
J
J
Note: The –I6 and –A6 speed grades of the Intel MAX 10 FPGA devices are not available by
default in the Intel Quartus Prime software. Contact your local Intel sales
representatives for support.
Related Links
Intel FPGA Product Selector
Provides the latest information about Intel FPGAs.
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Intel MAX 10 Device Feature Options
Table 3. Feature Options for Intel MAX 10 Devices
Option Feature
Compact Devices with core architecture featuring single configuration image with self-configuration capability
Flash Devices with core architecture featuring:
Dual configuration image with self-configuration capability
Remote system upgrade capability
Memory initialization
Analog Devices with core architecture featuring:
Dual configuration image with self-configuration capability
Remote system upgrade capability
Memory initialization
Integrated ADC
Intel MAX 10 Device Maximum Resources
Table 4. Maximum Resource Counts for Intel MAX 10 Devices
Resource Device
10M02 10M04 10M08 10M16 10M25 10M40 10M50
Logic Elements (LE) (K) 2 4 8 16 25 40 50
M9K Memory (Kb) 108 189 378 549 675 1,260 1,638
User Flash Memory (Kb)
(2)
96 1,248 1,376 2,368 3,200 5,888 5,888
18 × 18 Multiplier 16 20 24 45 55 125 144
PLL 2 2 2 4 4 4 4
GPIO 246 246 250 320 360 500 500
LVDS Dedicated
Transmitter
15 15 15 22 24 30 30
Emulated
Transmitter
114 114 116 151 171 241 241
Dedicated Receiver 114 114 116 151 171 241 241
Internal Configuration Image 1 2 2 2 2 2 2
ADC 1 1 1 2 2 2
(2)
The maximum possible value including user flash memory and configuration flash memory. For
more information, refer to Intel MAX 10 User Flash Memory User Guide.
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10M08SCE144I7G

Mfr. #:
Manufacturer:
Intel / Altera
Description:
FPGA - Field Programmable Gate Array non-volatile FPGA, 101 I/O, 144EQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union