LTC2850/LTC2851/LTC2852
10
285012fe
For more information www.linear.com/LTC2850
BLOCK DIAGRAM
LTC2850 LTC2851
LTC2852
SLEEP/SHUTDOWN
LOGIC AND DELAY
RECEIVER
DRIVER
RO
RE
DE
DI
A
(15kV)
V
CC
GND
B
(15kV)
285012 BDa
RECEIVER
DRIVER
RO
DI
285012 BDb
A
(15kV)
Z
(15kV)
Y
(15kV)
B
(15kV)
V
CC
GND
SLEEP/SHUTDOWN
LOGIC AND DELAY
RECEIVER
DRIVER
RO
RE
DE
DI
285012 BDc
A
(15kV)
Z
(15kV)
Y
(15kV)
B
(15kV)
V
CC
GND
LTC2850/LTC2851/LTC2852
11
285012fe
For more information www.linear.com/LTC2850
APPLICATIONS INFORMATION
Driver
The driver provides full RS485/RS422 compatibility. When
enabled, if DI is high, Y-Z is positive for the full-duplex
devices (LTC2851, LTC2852) and A-B is positive for the
half-duplex device (LTC2850).
When the driver is disabled, both outputs are high im-
pedance. For the full-duplex devices, the leakage on the
driver output pins is guaranteed to be less
than 10µA
over the entire common mode range of –7V to 12V. On
the half-duplex LTC2850, the impedance is dominated by
the receiver input resistance, R
IN
.
Driver Overvoltage and Overcurrent Protection
The driver outputs are protected from short-circuits
to any voltage within the Absolute Maximum range of
(V
CC
– 15V) to 15V. The typical peak current in this con-
dition does not exceed 180mA
.
If a high driver output is shorted to a voltage just above
V
CC
, a reverse current will flow into the supply. When
this voltage exceeds V
CC
by about 1.4V, the reverse
current turns off. Preventing the driver from turning off
with outputs shorted to output voltages just above V
CC
keeps the driver active even for receiver loads that have
a positive common mode with respect
to the driver
a valid condition.
The worst-case peak reverse short-circuit current can be as
high as 300mA in extreme cold conditions. If this current
can not be absorbed by the supply, a 3.6V Zener diode can
be added in parallel with the supply to sink this current.
All devices also feature thermal shutdown protection that
disables the driver and receiver in case of excessive
power
dissipation (see Note 4 in the Electrical Characteristics
section).
Receiver and Failsafe
With the receiver enabled, when the absolute value of
the differential voltage between the A and B pins is
greater than 200mV, the state of RO will reflect the
polarity of (A-B)
These parts have a failsafe feature that guarantees the
receiver output to be in a logic-high state when the inputs
are either shorted, left open, or terminated but not driven.
This failsafe feature is guaranteed to work for inputs
spanning the entire common mode range of –7V to 12V.
The receiver output is internally driven high (to V
CC
) or
low (to ground) with no external pull-up needed. When the
receiver is disabled the RO pin becomes Hi-Z with leakage
of less than ±1µA for voltages
within the supply range.
Receiver Input Resistance
The receiver input resistance from A or B to ground is
guaranteed to be greater than 96k (C-, I-grade). This is 8x
higher than the requirements for the RS485 standard and
thus this receiver represents a one-eighth unit load. This,
in turn, means that 8x the standard number of receivers,
or 256 total, can be connected to a line
without loading
it beyond what is specified in the RS485 standard. The
receiver input resistance from A or B to ground on high
temperature H-grade parts is greater than 48k providing
a one-quarter unit load. The high input resistance of the
receiver is maintained whether it is enabled or disabled,
powered or unpowered.
Supply Current
The unloaded static supply currents in these devices are
very low
, typically under 500µA for all modes of opera-
tion. In applications with resistively terminated cables,
the supply current is dominated by the driver load. For
example, when using two 120Ω terminators with a dif-
ferential driver output voltage of 2V, the DC load current
is 33mA, which is sourced by the positive voltage supply.
Power supply current increases with toggling data due to
capacitive loading and this
term can increase significantly
at high data rates. Figure 13 shows supply current vs
data rate for two different capacitive loads for the circuit
configuration of Figure 4.
High Speed Considerations
A ground plane layout is recommended. A 0.1µF bypass
capacitor less than one-quarter inch away from the V
CC
pin
is also recommended. The PC board traces connected to
signals A/B and Z/Y should be symmetrical
and as short
as possible to maintain good differential signal integrity.
LTC2850/LTC2851/LTC2852
12
285012fe
For more information www.linear.com/LTC2850
APPLICATIONS INFORMATION
To minimize capacitive effects, the differential signals
should be separated by more than the width of a trace
and should not be routed on top of each other if they are
on different signal planes.
Care should be taken to route outputs away from any
sensitive inputs to reduce feedback effects that might
cause noise, jitter, or even oscillations. For example, in
the full-duplex
devices, DI and A/B should not be routed
near the driver or receiver outputs.
The logic inputs have 150mV of hysteresis to provide noise
immunity. Fast edges on the outputs can cause glitches in
the ground and power supplies which are exacerbated by
capacitive loading. If a logic input is held near its threshold
(typically 1.5V), a noise glitch from a driver transition may
exceed
the hysteresis levels on the logic and data input
pins causing an unintended state change. This can be
avoided by maintaining normal logic levels on the pins
and by slewing inputs through their thresholds by faster
than 1V/µs when transitioning. Good supply decoupling
and proper driver termination also reduce glitches caused
by driver transitions.
285012 F14
DATA RATE (bps)
CABLE LENGTH (FT)
10k 1M 10M100k 100M
100
1k
10
10k
RS485/RS422
MAX DATA RATE
LTC2850/
LTC2851/LTC2852
MAX DATA RATE
Figure 14. Cable Length vs Data Rate
(RS485/RS422 Standard Shown in Solid Line)
Cable Length vs Data Rate
For a given data rate, the maximum transmission distance
is bounded by the cable properties. A curve of cable length
vs data rate compliant with the RS485/RS422 standards
is shown in Figure 14. Three regions of this curve reflect
different performance limiting factors in data transmis-
sion. In the
flat region of the curve, maximum distance
is determined by resistive losses in the cable. The down-
ward sloping region represents limits in distance and
data rate due to AC losses in the cable. The solid vertical
line represents the specified maximum data rate in the
RS485/RS422 standards. The dashed lines at 20Mbps
show the maximum data rates of the LTC2850, LTC2851
and LTC2852.
Figure 13. Supply Current vs Data Rate
DATA RATE (Mbps)
0.1
20
SUPPLY CURRENT (mA)
60
70
80
1 10 100
285012 F13
50
40
30
R
DIFF
= 54Ω
C
L
= 1000pF
C
L
= 100pF

LTC2852MPMS#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RS-422/RS-485 Interface IC 3.3V Full-Duplex 20Mbps RS485 Transceiver w/ Enables
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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