74HC4049D

74HC4049D,74HC4050D
1
CMOS Digital Integrated Circuits Silicon Monolithic
74HC4049D,74HC4050D
74HC4049D,74HC4050D
74HC4049D,74HC4050D
74HC4049D,74HC4050D
Start of commercial production
2016-03
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
Hex Buffer
74HC4049D: HEX BUFFER/CONVERTER (INVERTING)
74HC4050D: HEX BUFFER/CONVERTER
2.
2.
2.
2. General
General
General
General
The 74HC4049D and 74HC4050D are high speed CMOS HEX BUFFERs fabricated with silicon gate C
2
MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC4049D is an inverting buffer, while the 74HC4050D is a non-inverting buffer. The internal circuits
are composed of 3-stages (74HC4049D) or 2-stages (74HC4050D) of inverter, which provided high noise immunity
and stable output.
Input protection circuits are different from those of other high speed CMOS IC's. They eliminate the diodes on
the V
CC
side thus providing of logic-level conversion from high-level voltages up to 15 V to low-level voltages.
They are useful for battery back up circuits, because input voltage can be applied on IC's which are not biased
by V
CC
.
3.
3.
3.
3. Features
Features
Features
Features
(1) High speed: t
pd
= 8 ns (typ.) at V
CC
= 6.0 V
(2) Low power dissipation: I
CC
= 1.0 µA (max) at T
a
= 25
(3) Balanced propagation delays: t
PLH
t
PHL
(4) Wide operating voltage range: V
CC(opr)
= 2.0 V to 6.0 V
4.
4.
4.
4. Packaging
Packaging
Packaging
Packaging
SOIC16
2016-07-07
Rev.3.0
©2016 Toshiba Corporation
74HC4049D,74HC4050D
2
5.
5.
5.
5. Pin Assignment
Pin Assignment
Pin Assignment
Pin Assignment
74HC4049D 74HC4050D
6.
6.
6.
6. Marking
Marking
Marking
Marking
74HC4049D 74HC4050D
7.
7.
7.
7. IEC Logic Symbol
IEC Logic Symbol
IEC Logic Symbol
IEC Logic Symbol
74HC4049D 74HC4050D
8.
8.
8.
8. Truth Table
Truth Table
Truth Table
Truth Table
Input A
L
H
Output Y (74HC4049D)
H
L
Output Y (74HC4050D)
L
H
2016-07-07
Rev.3.0
©2016 Toshiba Corporation
74HC4049D,74HC4050D
3
9.
9.
9.
9. Internal Equivalent Circuit
Internal Equivalent Circuit
Internal Equivalent Circuit
Internal Equivalent Circuit
74HC4049D 74HC4050D
10.
10.
10.
10. Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
Note
(Note 1)
Rating
-0.5 to 7.0
-0.5 to 18.0
-0.5 to V
CC
+ 0.5
-20
±20
±35
±75
500
-65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: DC input voltage (V
IN
) specified is measured to GND and is not related to V
CC
.
Recommended operating range is 0 V to 15 V and it is possible to convert logic-levels from 15 V to 5 V or 5 V
to 2 V.
2016-07-07
Rev.3.0
©2016 Toshiba Corporation

74HC4049D

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Buffers & Line Drivers HEX INVERTING H/L LEVEL SH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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