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74HC14N,652

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
1. General description
The 74HC14; 74HCT14 is a high-speed Si-gate CMOS device and is pin compatible with
Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7A.
The 74HC14; 74HCT14 provides six inverting buffers with Schmitt-trigger action. It is
capable of transforming slowly changing input signals into sharply defined, jitter-free
output signals.
2. Features and benefits
Low-power dissipation
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
74HC14; 74HCT14
Hex inverting Schmitt trigger
Rev. 6 — 19 September 2012 Product data sheet
74HC_HCT14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 19 September 2012 2 of 21
NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
4. Ordering information
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC14N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT14N
74HC14D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT14D
74HC14DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HCT14DB
74HC14PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCT14PW
74HC14BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1
74HCT14BQ
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram
(one Schmitt trigger)
mna204
1A 1Y
1
2
2A 2Y
3
4
3A 3Y
5
6
4A 4Y
9
8
5A 5Y
11
10
6A 6Y
13
12
8
9
10
11
001aac497
12
13
2
1
4
3
6
5
mna025
A
Y
74HC_HCT14 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 6 — 19 September 2012 3 of 21
NXP Semiconductors
74HC14; 74HCT14
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level;
L = LOW voltage level.
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as a
supply pin or input.
Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14
14
1A V
CC
1Y 6A
2A 6Y
2Y 5A
3A 5Y
3Y 4A
GND 4Y
001aac498
1
2
3
4
5
6
7
8
10
9
12
11
14
13
001aac499
14
GND
(1)
Transparent top view
3Y 4A
3A 5Y
2Y 5A
2A 6Y
1Y 6A
GND
4Y
1A
V
CC
6 9
5 10
4 11
3 12
2 13
7
8
1
14
terminal 1
index area
Table 2. Pin description
Symbol Pin Description
1A to 6A 1, 3, 5, 9, 11, 13 data input 1
1Y to 6Y 2, 4, 6, 8, 10, 12 data output 1
GND 7 ground (0 V)
V
CC
14 supply voltage
Table 3. Function table
[1]
Input Output
nA nY
LH
HL
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

74HC14N,652

Mfr. #:
Buy 74HC14N,652
Manufacturer:
NXP Semiconductors
Description:
Inverters HEX INV SCHMITT TRIG
Lifecycle:
New from this manufacturer.
Delivery:
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