ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
Rev. E | Page 10 of 20
THEORY OF OPERATION
The ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
are ruggedized RS-232 line drivers/receivers that operate from a
single 5 V supply. Step-up voltage converters coupled with level
shifting transmitters and receivers allow RS-232 levels to be
developed while operating from a single 5 V supply.
Features include low power consumption, high transmission
rates, and compliance with the EU directive on EMC, which
includes protection against radiated and conducted interfere-
ence, including high levels of electrostatic discharge.
All RS-232 inputs and outputs contain protection against
electrostatic discharges up to ±15 kV and electrical fast tran-
sients up to ±2 kV. This ensures compliance to IEC 100042
and IEC 100044 requirements.
The devices are ideally suited for operation in electrically harsh
environments or where RS-232 cables are plugged/unplugged
frequently. They are also immune to high RF field strengths
without special shielding precautions.
Emissions are also controlled to within very strict limits.
TTL/CMOS technology is used to keep the power dissipation to
an absolute minimum, allowing maximum battery life in
portable applications. The ADM2xxE is a modification,
enhancement, and improvement to the ADM2xx family and its
derivatives. It is essentially plug-in compatible and does not
have materially different applications.
CIRCUIT DESCRIPTION
The internal circuitry consists of four main sections:
A charge pump voltage converter.
5 V logic to EIA-232 transmitters.
EIA-232 to 5 V logic receivers.
Transient protection circuit on all I/O lines.
Charge Pump DC-to-DC Voltage Converter
The charge pump voltage converter consists of a 200 kHz
oscillator and a switching matrix. The converter generates a
±10 V supply from the input 5 V level. This is done in two
stages using a switched capacitor technique as illustrated in
Figure 20 and Figure 21. First, the 5 V input supply is doubled
to 10 V using Capacitor C1 as the charge storage element. The
10 V level is then inverted to generate −10 V using C2 as the
storage element.
Capacitor C3 and Capacitor C4 are used to reduce the output
ripple. If desired, larger capacitors (up to 47 μF) can be used for
Capacitor C1 to Capacitor C4. This facilitates direct substitution
with older generation charge pump RS-232 transceivers.
The V+ and V– supplies can also be used to power external
circuitry, if the current requirements are small (see the
Typical
Performance Characteristics
section).
+ +
V
CC
GND
S1
S2
C1
S3
S4
C3
V+ = 2V
CC
V
CC
INTERNAL
OSCILLATOR
00068-020
Figure 20. Charge Pump Voltage Doubler
FROM
VOLTAGE
DOUBLER
+ +
V+
GND
S1
S2
C2
S3
S4
C4
GND
V– = –(V+)
INTERNAL
OSCILLATOR
00068-021
Figure 21. Charge Pump Voltage Inverter
Transmitter (Driver) Section
The drivers convert 5 V logic input levels into EIA-232 output
levels. With V
CC
= 5 V and driving an EIA-232 load, the output
voltage swing is typically ±9 V.
Unused inputs can be left unconnected, as an internal 400 kΩ
pull-up resistor pulls them high, forcing the outputs into a low
state. The input pull-up resistors typically source 8 μA when
grounded, so unused inputs should either be connected to V
CC
or left unconnected in order to minimize power consumption.
Receiver Section
The receivers are inverting level shifters that accept EIA-232 input
levels and translate them into 5 V logic output levels. The inputs
have internal 5 kΩ pull-down resistors to ground and are
protected against overvoltages of up to ±25 V. The guaranteed
switching thresholds are 0.4 V minimum and 2.4 V maximum.
Unconnected inputs are pulled to 0 V by the internal 5 kΩ pull-
down resistor. This, therefore, results in a Logic 1 output level for
unconnected inputs or for inputs connected to GND.
The receivers have Schmitt trigger inputs with a hysteresis level
of 0.65 V. This ensures error-free reception for both noisy
inputs and for inputs with slow transition times.
ENABLE AND SHUTDOWN
Table 3 and Table 4 are truth tables for the enable and shutdown
control signals. The enable function is intended to facilitate data
bus connections where it is desirable to tristate the receiver
outputs. In the disabled mode, all receiver outputs are placed in
a high impedance state. The shutdown function is intended to
shut down the device, thereby minimizing the quiescent
current. In shutdown, all transmitters are disabled and all
receivers on the ADM211E are tristated.
ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
Rev. E | Page 11 of 20
On the ADM213E, Receiver R4 and Receiver R5 remain
enabled in shutdown. Note that the transmitters are disabled
but are not tristated in shutdown; it is not permitted to connect
multiple (RS-232) driver outputs together.
The shutdown feature is very useful in battery-operated systems
since it reduces the power consumption to 1 μW. During
shutdown, the charge pump is also disabled. The shutdown
control input is active high on the ADM211E, and it is active
low on the ADM213E. When exiting shutdown, the charge
pump is restarted, and it takes approximately 100 μs for it to
reach its steady state operating condition.
HIGH BAUD RATE
The ADM2xxE feature high slew rates, permitting data
transmission rates well in excess of the EIA-232-E
specifications. RS-232 levels are maintained at data rates up to
230 kbps, even under worst-case loading conditions. This
allows for high speed data links between two terminals, making
it suitable for the new generation modem standards that require
data rates of 200 kbps. The slew rate is controlled internally to
less than 30 V/μs to minimize EMI interference.
t
DR
3
V
0V
EN INPUT
RECEIVER
OUTPUT
NOTES
1. EN IS THE COMPLEMENT OF EN FOR THE ADM213E.
00068-022
VOH
VOL
VOH –0.1V
VOL +0.1V
Figure 22. Receiver Disable Timing
t
ER
3
V
0V
EN INPUT
RECEIVER
OUTPUT
+3.5V
+0.8V
NOTES
1. EN IS THE COMPLEMENT OF EN FOR THE ADM213E.
00068-023
Figure 23. Receiver Enable Timing
ESD/EFT TRANSIENT PROTECTION SCHEME
The ADM2xxE use protective clamping structures on all inputs
and outputs that clamp the voltage to a safe level and dissipate
the energy present in ESD (electrostatic) and EFT (electrical
fast transient) discharges. A simplified schematic of the
protection structure is shown in
Figure 24 and Figure 25. Each
input and output contains two back-to-back high speed
clamping diodes. During normal operation, with maximum
RS232 signal levels, the diodes have no effect because one or
the other is reverse biased, depending on the polarity of the
signal. If, however, the voltage exceeds about ±50 V, reverse
breakdown occurs, and the voltage is clamped at this level. The
diodes are large p-n junctions designed to handle the
instantaneous current surges that can exceed several amperes.
The transmitter outputs and receiver inputs have a similar
protection structure. The receiver inputs can also dissipate some
of the energy through the internal 5 kΩ resistor to GND as well
as through the protection diodes.
The protection structure achieves ESD protection up to
±15 kV and EFT protection up to ±2 kV on all RS-232 I/O
lines. The methods used to test the protection scheme are
discussed in the
ESD Testing (IEC 100042) and EFT/Burst
Testing (IEC 100044)
sections.
R
IN
RX
D1
D2
R1
RECEIVER
INPUT
00068-024
Figure 24. Receiver Input Protection Scheme
T
OUT
RX
D1
D2
TRANSMITTER
OUTPUT
00068-025
Figure 25. Transmitter Output Protection Scheme
ESD TESTING (IEC 1000-4-2)
IEC 1000-4-2 (previously IEC 801-2) specifies compliance
testing using two coupling methods, contact discharge and air-
gap discharge. Contact discharge calls for a direct connection to
the unit being tested. Air-gap discharge uses a higher test voltage
but does not make direct contact with the unit under test. With
air-gap discharge, the discharge gun is moved toward the unit
under test, developing an arc across the air gap. This method is
influenced by humidity, temperature, barometric pressure,
distance, and rate of closure of the discharge gun. The contact
discharge method, while less realistic, is more repeatable and is
gaining acceptance in preference to the air-gap method.
Although very little energy is contained within an ESD pulse,
the extremely fast rise time, coupled with high voltages, can
cause failures in unprotected semiconductors. Catastrophic
ADM206E/ADM207E/ADM208E/ADM211E/ADM213E
Rev. E | Page 12 of 20
destruction can occur immediately because of arcing or heating.
Even if catastrophic failure does not occur immediately, the
device can suffer from parametric degradation that can result in
degraded performance. The cumulative effects of continuous
exposure can eventually lead to complete failure.
I/O lines are particularly vulnerable to ESD damage. Simply
touching or plugging in an I/O cable can result in a static
discharge that can damage or destroy the interface product
connected to the I/O port. Traditional ESD test methods, such
as the MIL-STD-883B method 3015.7, do not fully test product
susceptibility to this type of discharge. This test was intended to
test product susceptibility to ESD damage during handling.
Each pin is tested with respect to all other pins.
There are some important differences between the traditional
test and the IEC test:
The IEC test is much more stringent in terms of discharge
energy. The peak current injected is over four times greater.
The current rise time is significantly faster in the IEC test.
The IEC test is carried out while power is applied to
the device.
It is possible that the ESD discharge could induce latch-up in
the device being tested. This test, therefore, is more represent-
tative of a real-world I/O discharge, where the equipment is
operating normally with power applied. However, both tests
should be performed to ensure maximum protection both
during handling and later during field service.
R1 R2
C1
ESD TEST METHOD R2 C1
H. BODY MIL-STD-883B 1.5k 100pF
IEC 1000-4-2 330 150pF
HIGH
VOLTAGE
GENERATOR
DEVICE
UNDER TEST
00068-026
Figure 26. ESD Test Standards
100
I
PEAK
(%)
90
36.8
10
t
DL
t
RL
TIME t
00068-027
Figure 27. Human Body Model ESD Current Waveform
100
I
PEAK
(%)
90
10
0
.1ns TO 1ns
60ns
30ns
TIME t
00068-028
Figure 28. IEC 1000-4-2 ESD Current Waveform
ADM2xxE products are tested using both of the previously
mentioned test methods. Pins are tested with respect to all other
pins as per the MIL-STD-883B specification. In addition, all I/O
pins are tested per the IEC test specification. The products are
tested under the following conditions:
Power on (normal operation).
Power on (shutdown mode).
Power off.
There are four levels of compliance defined by IEC 1000-4-2.
ADM2xxE products meet the most stringent compliance level
both for contact and for air-gap discharge. This means that the
products are able to withstand contact discharges in excess of
8 kV and air-gap discharges in excess of 15 kV.
Table 7. IEC 1000-4-2 Compliance Levels
Level Contact Discharge (kV) Air-Gap Discharge (kV)
1 2 2
2 4 4
3 6 8
4 8 15
Table 8. ADM2xxE ESD Test Results
ESD Test Method I/O Pin (kV)
MIL-STD-883B ±15
IEC 1000-4-2
Contact ±8
Air-Gap ±15
EFT/BURST TESTING (IEC 1000-4-4)
IEC 1000-4-4 (previously IEC 801-4) covers EFT/burst
immunity. Electrical fast transients occur because of arcing
contacts in switches and relays. The tests simulate the
interference generated when, for example, a power relay
disconnects an inductive load. A spark is generated due to the
well-known back EMF effect. In fact, the spark consists of a

ADM213EARZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
RS-232 Interface IC 5V RS-232 TRANSCEIVER W/COMPLIANCE I.C.
Lifecycle:
New from this manufacturer.
Delivery:
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